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Filtering by: Conference name International Seaweed Symposium Remove constraint Conference name: International Seaweed Symposium Decade 2000-2009 Remove constraint Decade: 2000-2009 Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • New algorithms and architectures for arithmetic in GF(2[superscript m]) suitable for elliptic curve cryptography

    Creator:
    Rodríguez-Henríquez, Francisco
    Abstract:
    During the last few years we have seen formidable advances in digital and mobile communication technologies such as cordless and cellular telephones, personal communication systems, Internet connection expansion, etc. The vast majority of digital information used in all these applications is stored and also processed within a computer system, and...
    Resource Type:
    Dissertation
    Full Text:
    and storage has a paramount im- portance in the emerging international information infrastructure

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis

  • Advanced microarchitecture and circuit design techniques for on-chip memories in CMOS technology

    Creator:
    Hsu, Steven K.
    Abstract:
    In modern on-chip memories, an increasing demand for higher performance, lower power, reduced area, and improved robustness creates a rising need for advanced microarchitecture and circuit design techniques. Particularly in large-signal multi-ported register files, these advanced design techniques include: (i) multi-banked arrays, (ii) multi-frequency arrays, (iii) multi-bit width gating, (iv)...
    Resource Type:
    Dissertation

  • Instruction fetching, scheduling, and forwarding in a dynamic multithreaded processor

    Creator:
    Browning, Adam W.
    Abstract:
    Dynamic multithreaded processors attempt to increase the performance of a single sequential program by dynamically extracting threads from sources such as loop iterations. The scheduling of instructions in such a processor plays a vital role in the amount of thread level parallelism that can be extracted and thus the overall...
    Resource Type:
    Masters Thesis

  • Asymmetric clustering using a register cache

    Creator:
    Morrison, Roger Allen
    Abstract:
    Conventional register files spread porting resources uniformly across all registers. This paper proposes a method called Asymmetric Clustering using a Register Cache (ACRC). ACRC utilizes a fast register cache that concentrates valuable register file ports to the most active registers thereby reducing the total register file area and power consumption....
    Resource Type:
    Masters Thesis
    Full Text:
    Organization for Media Processing,” 6th International Symposium on High Performance Computer Architecture, pp

  • Low-power video decoding with dynamic voltage scaling

    Creator:
    Dixit, Reshma
    Abstract:
    This thesis investigates Dynamic Voltage Scaling (DVS) techniques to lower power consumption in video decoding. A DVS scheme called the Frame-data Computation Aware (FDCA) method has been presented. This method is adaptable not only to stored video applications but also to real-time video scenarios. Unlike DVS schemes for video decoding...
    Resource Type:
    Masters Thesis

  • Performance improvement with logic-level speculation

    Creator:
    Liu, Tong
    Abstract:
    Current superscalar microprocessors' performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). Higher frequency is achieved with process advancement, new circuit techniques, and microarchitectural improvement. Number of instructions processed per cycle depends mainly on microarchitecture techniques that exploit parallelism both spatially...
    Resource Type:
    Dissertation

  • Tolerating processor-memory performance gap

    Creator:
    Lai, Shih-Chang
    Abstract:
    While the performance gap between microprocessors and main memory is ever increasing each year, cache memory has been a bridge to alleviate this discrepancy. In this thesis proposal, we introduce three techniques to tolerate this processor and memory speed imbalance. First, we propose the bloom filter scheme to identify which...
    Resource Type:
    Dissertation

  • A survey on continuous-time modulators : theory, designs and implementations

    Creator:
    Gao, Xiaoran
    Abstract:
    Recently, delta-sigma modulation has become a widely applied technique for high-performance analog-to-digital conversion of narrow-band signals. Most of the early designs used discrete-time structure for good accuracy and good linearity. The transfer functions are independent of the clock frequency. However, high unity-gain bandwidths of the opamps are required to satisfy...
    Resource Type:
    Masters Thesis

  • A self-calibrated, reconfigurable RF LNA

    Creator:
    Jayaraman, Karthik
    Abstract:
    Modern wireless System-on-Chips (SoCs), such as mobile handsets, sensor networks, and mm-wave systems, integrate an entire RF system on a single CMOS chip. Such highly complex systems require significant on-chip digital signal processing to help improve the performance of highly sensitive analog/RF components. The IC market being competitive, the ability...
    Resource Type:
    Masters Thesis