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Filtering by: Creator Cluskey, S. A. Remove constraint Creator: Cluskey, S. A. Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering Degree Level Doctoral Remove constraint Degree Level: Doctoral

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  • IC-Antenna Co-Integration for Efficient and Scalable Millimeter-Wave Antenna Interfaces

    Creator:
    Liu,Yao
    Abstract:
    Millimeter-wave (mm-wave) technology promises high speed, high system capacity and low latency interconnects with reduced cost. Applications like high data-rate wireless links, next generation automotive sensors and security body scanners highly depend on mm-wave technology innovations. As operating frequency moves to higher mm-wave bands, shrinking antenna dimensions enable co-integration of...
    Resource Type:
    Dissertation
    Full Text:
    such channels can be combined to get a even wider bandwidth, 42.24Gb/s data-rate has been demonstrated

  • Energy efficient communication across on-chip wires in digital CMOS

    Creator:
    Postman, Jacob
    Abstract:
    For the past half century, CMOS process scaling has followed Moore's law, approximately doubling transistor density every 18 months. While locally routed wires have generally scaled with transistor size, longer wires have scaled at a slower rate and in some cases have grown larger as chip size and complexity have...
    Resource Type:
    Dissertation
    Full Text:
    N_off W-N_on S-E_off W_on S_off Route Compute East (a) R N R N R N R N R N R N R

  • Pattern recognition of speech using hybrid computer feature extraction

    Creator:
    Herr, Alan Jack
    Abstract:
    Most technological problems associated with man-machine conversations have been solved and are well documented in both the contemporary technical and lay literature. The major remaining technological problem is the real time conversion of a human's vocal uterances into a "written" phoneme sequence representing the information content of speech. The work...
    Resource Type:
    Dissertation
    Full Text:
    for Privacy Abstract approved: (S. A. Stone) Most technological problems associated with man-machine

  • The Architecture of a Reusable Built-In Self-Test for Link Training, IO and Memory Defect Detection and Auto Repair on 14nm Intel SOC

    Creator:
    Querbach, Bruce
    Abstract:
    The complexity of designing and testing today's system on chip (SOC) is increasing due to greater integrated circuit (IC) density and higher IO and memory frequencies. SOCs for the mobile phone and tablet market have the unique challenge of short product development windows, at times less than six months, and...
    Resource Type:
    Dissertation
    Full Text:
    6.4T/S 19 DRAM ORGANIZATION 20 ADJACENT NEIGHBORHOOD OF A MEMORY CELL B 21 DRAM FAULT SIMULATION

  • Modeling and analysis of spur structure of digital-to-time conversion based frequency synthesizers

    Creator:
    Talwalkar, Sumit A.
    Abstract:
    Frequency synthesizers are critical components of all communication systems. This thesis considers the issue of undesirable frequency spurs of a relatively recent type of frequency synthesis architecture called digital-to-time conversion (DTC). The DTC-based frequency synthesis architecture has important performance benefits over older frequency synthesizers, such as fast frequency switching, large...
    Resource Type:
    Dissertation
    Full Text:
    control signals CS and CR and a S-R (set-reset) flip flop (FF) shown in Figure 1.4. 10

  • Design techniques for low-power multi-GS/s analog-to-digital converters

    Creator:
    Jiang, Tao
    Abstract:
    Ultra-high-speed (>10GS/s), medium-resolution (5~6bit), low-power (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and next-generation serial link receivers. There are several challenges to enable a successful design, however. First, the time-interleaved architecture is required in order to achieve over 10GS/s sampling rate, with the trade-off...
    Resource Type:
    Dissertation
    Full Text:
    previous work of sub-ADC, a 12-GS/s 5-b 50-mW ADC is designed in 40nm CMOS with 8 time-interleaved

  • Analysis and design on low-power multi-Gb/s serial links

    Creator:
    Hu, Kangmin
    Abstract:
    High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most...
    Resource Type:
    Dissertation
    Full Text:
    -7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew

  • Application of Nonlinear Model Predictive Controller for Ocean Wave Energy Conversion Systems

    Creator:
    Haider, Ali S.
    Abstract:
    This work addresses the application of Nonlinear Model Predictive Control (NMPC) to a class of ocean wave energy conversion systems in which the cost functional is not in a standard quadratic form, and the WEC model includes the nonlinear effects, such as the hydrodynamic viscous drag. The NMPC implementation is...
    Resource Type:
    Dissertation
    Full Text:
    ) to a class of ocean wave energy conversion systems in which the cost functional is not in a

  • A new comptutational method for constrained nonlinear programming

    Creator:
    Bhatia, Surendra P. S.
    Abstract:
    In this dissertation, a new computational method for equality constrained nonlinear programming is developed. Specifically, problems of minimizing a nonlinear objective function f(x) subject to constraints h(x) = 0, where f is a scalar valued, x is an n-vector and h is a m-vector with m < n is considered....
    Resource Type:
    Dissertation
    Full Text:
    Computational Method for Constrained Nonlinear Programming by Surendra P. S. Bhatia A THESIS submitted to

  • Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter with 8X oversampling and 4 MHz Nyquist output rate

    Creator:
    Jiang, Ruoxin
    Abstract:
    In this dissertation, a new Δ∑ A/D converter is presented that is ideally suited for communication applications. It is based on a single-loop single-stage structure, which can realize a high maximum out-of-band quantization noise gain while maintaining stable operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order...
    Resource Type:
    Dissertation
    Full Text:
    Rate. Abstract approved: Tern S. Fiez In this dissertation, a new LI A/D converter is presented that