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Filtering by: DOI 10.1007/s12230-012-9278-8 Remove constraint DOI: 10.1007/s12230-012-9278-8 Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • Investigation of Infrared Absorption of Carbon Dioxide in Metal–Organic Framework Material

    Creator:
    Li, Shiwen
    Abstract:
    Due to the advantages of the high surface area and high porosity, Metal-Organic Framework (MOF) materials are widely used in gas storage. As a typical MOF material, Zeolitic Imidazolate Framework-8 (Zif-8) has high selectivity and adsorption capability of carbon dioxide (CO2). In this thesis, we investigated the infrared absorption of...
    Resource Type:
    Masters Thesis
    Full Text:
    Imidazolate Framework-8 (Zif-8) has high selectivity and adsorption capability of carbon dioxide (CO2). In

  • Advancing Power Grid Computing: Analysis and Synthesis of Wide-Area Data, Distributed Real-Time Hardware-In-the-Loop Simulations, and Machine Learning for Event Detection

    Creator:
    Hagan, Travis
    Abstract:
    Global Positioning Systems have allowed for precise timing of power system measurements over wide areas. This newly found capability has the potential to provide much greater insight into the operation of the power system and its response to contingencies, but few analytical techniques currently exist that provide enough robustness and...
    Resource Type:
    Dissertation
    Full Text:
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  • Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter with 8X oversampling and 4 MHz Nyquist output rate

    Creator:
    Jiang, Ruoxin
    Abstract:
    In this dissertation, a new Δ∑ A/D converter is presented that is ideally suited for communication applications. It is based on a single-loop single-stage structure, which can realize a high maximum out-of-band quantization noise gain while maintaining stable operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order...
    Resource Type:
    Dissertation
    Full Text:
    operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order LI analog-to-digital

  • Hybrid, high speed fault detection based on instantaneous line voltages

    Creator:
    Ramchandani, Hiranand Balchand
    Abstract:
    This fault detection scheme is based on sampling the instantaneous phase voltages and checking their sum and magnitude against a specified voltage. Faults on the system cause unbalances and distortion of the phase voltages and currents. The currents and voltages change in magnitude and/or phase position with respect to the...
    Resource Type:
    Dissertation
    Full Text:
    condition indicates a fault. This scheme detected the fault within one-half cycle (8 milliseconds) in the

  • Design and performance estimation of two-dimensional discrete cosine transform

    Creator:
    Li, Quanrong
    Abstract:
    A VLSI system for image compression based on two dimensional discrete cosine transform (2-D DCT) is designed and its performance is estimated. The focus is mainly on the reduction of power consumption and a reasonable speed. A 2-D DCT algorithm called row-column decomposition is chosen for the VLSI design of...
    Resource Type:
    Masters Thesis
    Full Text:
    more than 20MHz for 8 by 8 image blocks using 1.2u CMOS technology. Based on the effective switched

  • Design and Implementation of a Ride-On Car with Data Tracking for Use by Young Children with Developmental Differences

    Creator:
    Brian, Makenzie M.
    Abstract:
    This work describes the design and modification of a commercial children’s ride-on car to effectively collect usage data. The design is cheap and could be easily modified to gather more information. This will serve as a viable way to collect information about how motorized independence can help children with developmental...
    Resource Type:
    Honors College Thesis
    Full Text:
    these skills [1,2,5-8]. The increased mobility and independence that the ROC provides has been shown

  • Design of Energy-Efficient Equalization and Data Encoding/Decoding Techniques for Wireline Communication Systems

    Creator:
    Chun, Yu Sang
    Abstract:
    Ever increasing global internet data traffic has driven up the demand for cutting-edge high-speed wireline communication systems including SerDes PHY for various interfaces, interconnects, data centers servers and switches in optical systems. Operating wireline communications at higher data rates leads to signals suffering from greater channel loss and exponential increase...
    Resource Type:
    Dissertation
    Full Text:
    -order pulse amplitude modulation (PAM) including PAM-8, and 2) an inter-symbol interference (ISI

  • New Architectures and Circuits for Pushing the Dynamic Range and Multiplexing Boundaries of CMOS-Integrated Sensors

    Creator:
    Ouh, Hyunkyu
    Abstract:
    Over the last decades, CMOS-integrated sensors have made impressive progress in performance, form-factor, and energy-efficiency for various applications such as imaging, physical/chemical sensing, bio/health monitoring. In the era of the artificial intelligence (AI) and the internet-of-things (IoT), such CMOS-integrated sensors are essential for massive and comprehensive data acquisition, where sensing...
    Resource Type:
    Dissertation
    Full Text:
    reconfigurable, closed-loop high-voltage charge pump in the same substrate. An 8 x 8 array architecture along

  • High-performance low-power microprocessor circuits

    Creator:
    Hsu, Steven K.
    Abstract:
    This thesis will discuss two critical components of a digital system -- domino logic styles and flip-flops. In today's microprocessors, both domino logic and flip-flops are essential to high-performance and low-power design. Two new domino logic styles are presented and analyzed, Double Edge Triggered (DET) and Double Data Rate (DDR)...
    Resource Type:
    Masters Thesis
    Full Text:
    , HSPICE simulations show that a DET & DDR 8-bit adder has a maximum throughput of l.6Gops (Giga

  • Low-power high-linearity digital-to-analog converters

    Creator:
    Kuo, Ming-Hung
    Abstract:
    In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB) + 6 (MSB) segmented architecture to achieve high performance for minimum area. The implemented LSB DAC is based on quasi-passive pipelined DAC that has been...
    Resource Type:
    Masters Thesis
    Full Text:
    converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8