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Filtering by: Advisor Dunn, John M. Remove constraint Advisor: Dunn, John M. Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • The architecture and design of a parallel sorting engine

    Creator:
    Bate, John G.
    Abstract:
    Sorting is typically a compute intensive operation used in many areas of industry. With improved technology, both in the VLSI and CAE areas, we can afford to develop hardware based database computers to move the work load off the main computer. In this thesis the architecture of a VLSI parallel...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF John G. Bate for the degree of Master of Science in Electrical and

  • Analysis and synthesis of neural networks

    Creator:
    Skelton, Jeanette K.
    Abstract:
    The brain has long attracted the interest of researchers. Some tasks, such as pattern recognition and optimization, have proven to be exceptionally difficult for conventional computing systems to perform, but are executed by the brain almost effortlessly. Due to the large number of neurons and interconnections, it has proven impossible...
    Resource Type:
    Masters Thesis
    Full Text:
    : Redacted for Privacy John M. ay The brain has long attracted the interest of researchers. Some tasks, such

  • The design of a single chip logic state analyzer

    Creator:
    Hung, Shih-chuan
    Abstract:
    This thesis describes the design of a single-chip logic analyzer. The utility of such a chip in measuring and recording digital system parameters is illustrated. Possibilities for future applications of this chip in performance monitoring of computer systems are discussed.
    Resource Type:
    Masters Thesis
    Full Text:
    approved: Redacted for Privacy John M. Murray This thesis describes the design of a single-chip logic

  • The analysis and synthesis of a parallel sorting engine

    Creator:
    Ahn, Byoungchul
    Abstract:
    This thesis is concerned with the development of a unique parallel sort-merge system suitable for implementation in VLSI. Two new sorting subsystems, a high performance VLSI sorter and a four-way merger, were also realized during the development process. In addition, the analysis of several existing parallel sorting architectures and algorithms...
    Resource Type:
    Dissertation
    Full Text:
    Sorting Engine Abstract approv, Redacted for Privacy John M. Murray / This thesis is concerned with the

  • An implementation of the Department of Defense's transmission control protocol internet protocol (TCP/IP) for the Microsoft OS/2 operating system

    Creator:
    Pillay, Harish
    Abstract:
    This thesis discusses an approach whereby Microsoft's MS OS/2 is provided with a means of running the Department of Defense's Transmission Control Protocol/Internet Protocol (TCP/IP). This is done by developing a Packet Protocol Device Driver. This device driver complies with the Packet Driver Specification from FTP Software Inc. and with...
    Resource Type:
    Masters Thesis

  • Device characterization and analog circuit design for heterojunction FETs

    Creator:
    Wang, Binan
    Abstract:
    Present day data processing technology requires very high speed signal processing and data conversion rates. Traditionally, these circuits have been implemented in silicon MOS technology, whose high speed performance is limited, due to inherent material properties. Though relatively immature compared to silicon technology, GaAs integrated circuit technology appears to be...
    Resource Type:
    Masters Thesis
    Full Text:
    Circuit Design for Heterojunction PETs Abstract approved: Steve M. Goodnick, advisor hn G. Kenney, co-o

  • Growth, fabrication and testing of pseudomorphic P-channel GaAs/InGaAs/AlGaAs MODFETS

    Creator:
    Schulte, Donald W.
    Abstract:
    This thesis reports on the growth and characterization of p-type pseudomorphic A1GaAs /InGaAs /GaAs modulation doped field effect transistor (MODFET) structures. A series of different p-type MODFET structures were grown with a systematic variation of the indium mole fraction and quantum well width of the InGaAs channel region. Extensive characterization...
    Resource Type:
    Masters Thesis
    Full Text:
    Privacy John R. Arthur, Advisor Redacted for Privacy Stephen M. Goodnick, Co-Advisor This thesis