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  • Novel structures for high-speed delta-sigma data converters

    Creator:
    Chae, Jeong Seok
    Abstract:
    As CMOS processes keep scaling down devices, the maximum operating frequencies of CMOS devices increase, and hence circuits can process very wide band signals. Moreover, the small physical dimensions of transistors allow the placing of many more blocks into a single chip, including highly accurate analog blocks and complicated digital...
    Resource Type:
    Dissertation
    Full Text:
    320 MHz sampling clock. The peak SNDR was 63 dB. The figure-of-merit FoM = P/(2*BW*2 ENOB) was

  • Experimental verification of a mismatch-shaping DAC

    Creator:
    Hudson, William Forrest, 1971-
    Abstract:
    Delta-sigma data converters have gained popularity in both analog-to-digital and digital-to-analog converters (ADCs and DACs) due to their simplicity, high linearity and immunity to many analog circuit imperfections. These data converters include features such as oversampling, noise-shaping, and (historically) single-bit quantization. Single-bit converters are preferred for their inherent linearity. This...
    Resource Type:
    Masters Thesis
    Full Text:
    equipment. 40 4.8 Output spectrum with fs = 500 kHz, 0th order ESL. 41 4.9 Output spectrum with fs = 500

  • Oscillators and phase locked loops for space radiation environments

    Creator:
    Vandepas, Martin
    Abstract:
    Circuits operating outside the earth’s atmosphere are more vulnerable to cosmic radiation and require special design consideration. The purpose of this work is to explore methods of mitigating the effect of radiation in phase locked loop (PLL) circuits. Several voltage controlled oscillators (VCOs) and two complete PLLs are designed and...
    Resource Type:
    Masters Thesis
    Full Text:
    10 −6 10 −4 10 −2 280 290 300 310 320 330 340 Mean−Squared Power Supply Noise (V2 on log

  • A dual-frequency diode laser displacement sensor

    Creator:
    Hwang, Nam
    Resource Type:
    Masters Thesis
    Full Text:
    oscilloscope traces ( fs = 100.00 MHz, fLO = 100.01 MHz, and dz = 37.5 cm ). Fig. 3-8 (b) Monitored

  • Digital Friendly Continuous-Time Delta-Sigma Analog-to-Digital Converters

    Creator:
    Maghami, Hamidreza
    Abstract:
    Conventional Delta-Sigma analog-to-digital converters (ADCs) utilize operational transconductance amplifiers (OTAs) in their loop filter implementation followed by multi-bit voltage domain quantizers. As CMOS integrated circuit technology scales to smaller geometries, the minimum transistor length and the intrinsic gain of the transistors decrease. Moreover, with process scaling the voltage headroom decreases...
    Resource Type:
    Dissertation
    Full Text:
    zero and 2π radians, the maximum value of the second term is fs/KV CO1. Note that the value of ffr1 is

  • High efficiency delta-sigma modulation data converters

    Creator:
    Lee, Kyehyung
    Abstract:
    Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
    Resource Type:
    Dissertation
    Full Text:
    drivers for the headphones. The digital filter increases the sampling rate from fs = 48 kHz to 64·fs

  • Low noise FSCL digital circuits for decimation filter

    Creator:
    Wong, Man Wa
    Abstract:
    A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed to implement the digital section of mixed-signal IC applications. This FSCL circuit technique offers the advantage of low overlap current spikes during the switching transitions of conventional CMOS gates. This overlap current spike has become one of...
    Resource Type:
    Masters Thesis
    Full Text:
    modu- lation, noise can be filtered out by the low-pass decimation filter. Input X(t) HIntegrator fs

  • Micropower incremental analog-to-digital converters

    Creator:
    Chen, Chia-Hung
    Abstract:
    Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended counting with a Nyquist-rate ADC. A single-loop incremental ADC was designed and fabricated in 90 nm for a biosensor interface circuit. It incorporates one integrator,...
    Resource Type:
    Dissertation
    Full Text:
    as 6 VSQNR  20log( FS )  20log( L M ) (2.8) EIADC

  • Design techniques for wideband low-power Delta-Sigma analog-to-digital converters

    Creator:
    Wang, Yan
    Abstract:
    Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems,high-definition television and radar systems. There are two general realizations...
    Resource Type:
    Dissertation
    Full Text:
    Quantization. AAF S/HfB Quantizer(ADC) N fs fs V fs Analog DigitalAnalog Input Figure 2.1: Block

  • Ultra-Wideband Relay Communication Systems

    Creator:
    Abbasi, Arash
    Abstract:
    Impulse-radio ultra-wide-band (IR-UWB) signaling is a promising technique for high-speed, short-range relay communications networks. Depending on how the relay node retransmits the signal, there are two main relay schemes: conventional one-directional (one-way) relay model, and bi-directional (two-way) relay model. In bi-directional relay communications, wireless network coding (WNC), also called physical-layer...
    Resource Type:
    Dissertation
    Full Text:
    sampled uniformly at sub-Nyquist rate fs ≥ (ω2 − ω1) /2π, then the N samples of Y (ω) with step ω0 = ω2