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Filtering by: Creator Choephel, T. K. Remove constraint Creator: Choephel, T. K. Degree Level Doctoral Remove constraint Degree Level: Doctoral Subject Analog-to-digital converters -- Design and construction Remove constraint Subject: Analog-to-digital converters -- Design and construction

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  • Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter with 8X oversampling and 4 MHz Nyquist output rate

    Creator:
    Jiang, Ruoxin
    Abstract:
    In this dissertation, a new Δ∑ A/D converter is presented that is ideally suited for communication applications. It is based on a single-loop single-stage structure, which can realize a high maximum out-of-band quantization noise gain while maintaining stable operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order...
    Resource Type:
    Dissertation
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    K. Plant, Dr. Karti Mayaram, Dr. Un-Ku Moon, Dr. Gabor C. Temes, and Dr. John T. Stonick for

  • A wideband low-power continuous-time delta-sigma modulator for next generation wireless applications

    Creator:
    Chen, Xuefeng
    Abstract:
    Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are widely used in wireless transceivers. Recently, continuous-time (CT) ΔΣ ADCs gain growing interest in wireless applications for their lower power consumption and wider input bandwidth as compared with the discrete-time (DT) counterparts. In this thesis, a wideband low-power CT ΔΣ modulator for next generation...
    Resource Type:
    Dissertation
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    -hold (S/H) or track-and-hold (T/H) block

  • High efficiency delta-sigma modulation data converters

    Creator:
    Lee, Kyehyung
    Abstract:
    Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
    Resource Type:
    Dissertation
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    5.4 (a) Pole locus with k at m = 2.5. (b) Pole locus with m at k = 0.5 for modulator in Fig. 5.3

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
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    achieves a figure of merit of 40 fJ/C-S. 4. A low-gain amplifier based V-T converter is utilized along

  • Design techniques for low power ADCs

    Creator:
    Yu, Wenhuan
    Abstract:
    This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the noise performance of the incremental ADC, and a new optimization technique was proposed to minimize the output noise. In the calibration mode, the incremental ADC...
    Resource Type:
    Dissertation
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    incremental ADC can be modeled as shown in Fig. 2-4, where u(k) is the input signal, t(k) is the input

  • Adaptive, wideband analog-to-digital conversion for convergent communication systems

    Creator:
    Batten, Robert D., 1973-
    Abstract:
    The exponential rate of advances in modern communication devices in the last several years have brought us higher levels of functionality and performance as well as reductions in physical size and power consumption. To continue this rate of advancement, next generation systems require wider bandwidth and higher resolution ADCs. Additionally,...
    Resource Type:
    Dissertation
    Full Text:
    C l o c k D i g i t a l O u t A D C Figure 2.1: An ADC showing the track-and-hold block. an

  • Design of a 14-bit continuous-time Delta-Sigma A/D modulator with 2.5MHz signal bandwidth

    Creator:
    Li, Zhimin
    Abstract:
    In recent years, there has been growing interest in both industry and academia to use continuous-time (CT) Δ-Σ A/D converters for wideband wireless and wireline communication applications. So far no reported CT Δ-Σ A/D modulator achieves 14-bit or higher dynamic range (DR) with more than 2MHz signal bandwidth (equivalently 4MS/s)....
    Resource Type:
    Dissertation
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    CC = . HDAC(s) X(t) y(k)GC(s) u1(k) e HC(s) T Figure 3.5 A general CT Δ -Σ A/D modulator

  • Low-voltage data converters

    Creator:
    Meng, Qingdong
    Abstract:
    With the growing demand for portable/consumer electronics, such as digital audio/video (AV), the downscaling of device dimensions, which enables the integration of an increasing number of transistors in a single chip, is mandatory. This trend also continuously pushes the power supply voltage down to reduce the power consumption and improve...
    Resource Type:
    Dissertation
    Full Text:
    introduced by the 1-bit truncator is given by e(k) = v(k) – y(k) (2.2) where v is the modulator

  • Architectural Solutions for Analog Imperfections in ΔΣ Analog-to-Digital Based Systems

    Creator:
    Zali Asl, Samira
    Abstract:
    For today’s ubiquitous portable devices, innovative integrated circuits with high performance yet very low power are necessary. As these devices are used to communicate and sense real world signals in the environment, analog-to-digital converters (ADC) and systems are the key interface circuits needed to digitize the sensed information and they...
    Resource Type:
    Dissertation
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    input of 𝑉𝑉𝑖𝑖𝑛𝑛[𝑛𝑛𝑛𝑛] = 𝐴𝐴𝐴𝐴𝐴𝐴𝐴𝐴(2𝜋𝜋𝑓𝑓𝑖𝑖𝑛𝑛𝑛𝑛𝑛𝑛), in one clock period (T

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
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    . [2] H. Kalva, A. Bocik, H. Chen, K. Egiazarian and Z. Wang, “Introduction to the issue on perception