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Filtering by: Subject Computer arithmetic Remove constraint Subject: Computer arithmetic Degree Level Master's Remove constraint Degree Level: Master's Language English [eng] Remove constraint Language: English [eng]

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  • Signed Digit Representation of Numbers

    Creator:
    Venkatachalapathy, Savithri
    Abstract:
    "A non-redundant number system has the digit set limited ranging from 0 to radix -1. While the Signed digit numbers have digit set consisting of more than radix r values. Hence it is also called redundant number system. Furthermore, the advantage of redundant number system lies in its application for...
    Resource Type:
    Capstone Project
    Full Text:
    : Computer Arithmetic Algorithms. Prentice Hall, Engelwood Cliffs, New Jersey, 1993. 2 . Algirdas

  • An alternative architecture for performing basic computer arithmetical operations

    Creator:
    Djang, Kevin
    Abstract:
    The arithmetic portions of almost all modern processor architectures are of very similar design. We use the term "traditional" to describe this design, the primary characteristics of which are native support for integer and floating-point number types and special disjoint instructions and hardware for each supported type. Decades of refinement...
    Resource Type:
    Masters Thesis
    Full Text:
    Computer Arithmetical Operations. Abstract approved: Paul Cull The arithmetic portions of almost all

  • Improving throughput of networks of radix-2 on-line arithmetic modules for small precision applications

    Creator:
    Shantilal, Ajay Chordia
    Abstract:
    On-line arithmetic modules were proposed as a way to explore parallelism in arithmetic operations at digit level. Using always serial operators that receive inputs and compute the outputs from most-significant to least-significant digits, online arithmetic makes it possible to overlap all arithmetic operations and have a pipelined structure. On-line division...
    Resource Type:
    Masters Thesis
    Full Text:
    results obtained for Digital Image Processing network. . . 57 1. INTRODUCTION Computer arithmetic

  • The low-power design of prefix adder

    Creator:
    Chang, Che-jen
    Abstract:
    Minimizing the dynamic power consumption of a circuit is becoming a more and more important issue for digital circuit design in the age of portable electronics. Among all the arithmetic circuits, addition is the most fundamental operation. Therefore, designing low power adder is an important and necessary research area. In...
    Resource Type:
    Masters Thesis
    Full Text:
    THESIS OF Che-Jen Chang for the degree of Master of Science in Electrical and Computer Engineering

  • Design of high-speed summing circuitry and comparator for adaptive parallel multi-level decision feedback equalization

    Creator:
    Gao, Hairong
    Abstract:
    Multi-level decision feedback equalization (MDFE) is an effective sampled signal processing technique to remove inter-symbol interference (ISI) from disk read-back signals. Parallelism which doubles the symbol rate can be realized by utilizing the characteristic of channel response and decision feedback equalization algorithm. A mixed-signal IC implementation has been chosen for...
    Resource Type:
    Masters Thesis
    Full Text:
    for the degree of Master of Science in Electrical and Computer Engineering presented on June 23rd

  • Design and evaluation of on-line arithmetic modules and networks for signal processing applications on FPGAs

    Creator:
    Galli, Reto
    Abstract:
    Several papers propose the use of on-line arithmetic for signal processing applications implemented on FPGAs. Although those papers provide reasonable arguments for the use of on-line arithmetic, they give only inadequate or incomplete comparisons of the proposed on-line designs to other state of the art solutions on FPGAs. In this...
    Resource Type:
    Masters Thesis
    Full Text:
    this project. Without his introduction to the complex field of computer arithmetic this work would

  • Investigating new design alternatives for a radix-2 modular multiplier kernal and I/O subsystem

    Creator:
    Chaitheerayanon, Akekalak
    Abstract:
    A main arithmetic operation for cryptographic systems is modular exponenti- ation. Exponentiation is computed by a long sequence of modular multiplications. Modular multiplication can be implemented in a general-purpose processor or a dedicated hardware, but dedicated hardware tends to be faster than a processor. Modular multiplication is a time-consuming operation,...
    Resource Type:
    Masters Thesis
    Full Text:
    for the degree of Master of Science in Electrical & Computer Engineering presented on December 16