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Filtering by: Advisor Temes, G. C. Remove constraint Advisor: Temes, G. C. Degree Name Master of Science (M.S.) Remove constraint Degree Name: Master of Science (M.S.)

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  • Analysis and design of oversampled digital-to-analog converters

    Creator:
    Xu, Xiaofeng
    Abstract:
    Oversampled data converters are becoming increasingly popular for high-precision data conversion. There have been many publications on oversampled analog-to-digital (A/D) converters but relatively few on oversampled digital-to-analog (D/A) converters. In this thesis, issues concerning the analysis and design of the oversampled D/A converters are addressed. Simulation tools and analytical methods...
    Resource Type:
    Masters Thesis
    Full Text:
    -Analog Converters Abstract approved: Redacted for Privacy G. C. Temes Oversampled data converters are

  • 5th-Order Elliptic LPF Using Passive Charge Compensation Technique (PCC) Design

    Creator:
    Tsai, Cheng H.
    Abstract:
    The passive charge compensation (PCC) technique was introduced for switched capacitor (SC) circuit to increase the slew rate and enhance the linearity performance, as PCC techniques are used on the Delta-Sigma modulator (DSM) in ADC circuitry. The PCC technique of the project was applied to the design of a SC...
    Resource Type:
    Masters Thesis
    Full Text:
    : ______________________________________________________ Gabor C. Temes The passive charge compensation (PCC) technique was introduced for

  • Low-Power 12-bit Quasi-Passive Segmented DAC Implemented in 130nm CMOS Technology

    Creator:
    Pierce, Alexander G.
    Abstract:
    This thesis work proposes a low-power 12-bit digital-to-analog converter (DAC) designed in a 130nm process. The DAC to be presented is of a segmented design where the architecture is split into pipelined and thermometer coded segments. This allows for high linearity and low distortion while maintaining high speed and low...
    Resource Type:
    Masters Thesis
    Full Text:
    Gabor C. Temes This thesis work proposes a low-power 12-bit digital-to-analog converter (DAC

  • Effects and compensation of the analog integrator nonidealities in dual-quantization delta-sigma modulators

    Creator:
    Yang, Yaohua, 1969-
    Resource Type:
    Masters Thesis
    Full Text:
    -Sigma Modulators Redacted for Privacy Abstract approved: GAL- C. Temes Oversampled delta-sigma (AZ

  • The design of a postfilter for a delta-sigma digital-to-analog converter

    Creator:
    Chen, Chao-Yin
    Resource Type:
    Masters Thesis
    Full Text:
    advisor Professor Gabor C. Temes for his wisdom and thoughtful guidance of the work and his

  • MOSFET-only predictive track and hold circuit

    Creator:
    Qiu, Xiangping
    Abstract:
    High-accuracy and high-speed CMOS track-and-hold (T/H) or sample-and-hold (S/H) circuits are an important part of the analog-to-digital interface. The switched-capacitor (SC) circuits usually contain one or more op-amps whose dc offset, finite gain, finite bandwidth have a big impact on the accuracy of the track-and-hold circuit. Basic correlated double sampling...
    Resource Type:
    Masters Thesis
    Full Text:
    -signal gate capacitance per unit area is given by: d dQ c G (2.3)- v GB "KGB where C'g = C'gs + C'gd

  • Analysis and measurement of charge injection in switched-capacitor circuits

    Creator:
    Shen, Min
    Abstract:
    It has been verified by theoretical analysis, circuit simulation and test that two switch transistors in parallel in a simple sample and hold circuit can be achieve high speed with low error voltage due to charge injection. The wide transistor provides low RC time constant when it is closed and...
    Resource Type:
    Masters Thesis
    Full Text:
    Injection in Switched-Capacitor Circuits. Abstract approved: Gabor C. Temes It has been verified by

  • Low-voltage switched-capacitor circuits

    Creator:
    Bidari, Emad
    Abstract:
    In recent years, the rapidly growth of CMOS technology has evolved towards submicron and deep-submicron features. Due to smaller device sizes, and significant demand for low-power designs, the maximum allowable power supply voltage is restricted. So far, two solutions; clock boosting and switched opamp schemes have been proposed. The material...
    Resource Type:
    Masters Thesis
    Full Text:
    : Gabor C. Temes In recent years, the rapidly growth of CMOS technology has evolved towards submicron

  • The design of delta-sigma modulators for multi-standard RF receivers

    Creator:
    Liu, Mingliang
    Abstract:
    The transition from second-generation (2G) to third-generation (3G) wireless cellular and cordless telephone systems requires multi-standard adaptability in a single RF receiver equipment. An important answer to this request is the use of Delta-Sigma modulators for IF-to-baseband conversion, which will satisfy the dynamic range requirements for digital signal processing, and...
    Resource Type:
    Masters Thesis
    Full Text:
    of Delta-Sigma Modulators for Multi-Standard RF Receivers Abstract approved: Gábor C. Temes The

  • A study of basic building blocks of analog-to-digital delta-sigma modulators

    Creator:
    Guo, Yuhua
    Abstract:
    In this thesis, a novel Direct-Charge-Transfer (DCT) integrator structure is proposed, which can settle much faster than regular switch-capacitor integrators. A new Spread-Spectrum Dynamic Element Matching (SS-DEM) algorithm is also introduced, which can effectively spread or shape the nonlinearity error of multi-bit DAC in the feedback path, thus improve the...
    Resource Type:
    Masters Thesis
    Full Text:
    Basic Building Blocks of Analog-to-Digital Delta-Sigma Modulators Abstract approved: Gabor C. Temes