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Filtering by: Committee Member Tenca, Alexandre F. Remove constraint Committee Member: Tenca, Alexandre F. Peer Reviewed No Remove constraint Peer Reviewed: No

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  • Designing a dedicated TCP/IP core used for internet appliances at home : an example of a simple hardware web server

    Creator:
    Liu, Huibo
    Abstract:
    Internet appliances at home are still at the beginning stage of development now. Many solutions are provided to connect those home appliances on net by wireless way or through wire. However, this thesis only focuses on the key issue of internet appliances, which is connectivity symbolized by the TCP/IP layer...
    Resource Type:
    Masters Thesis
    Full Text:
    minor professor. Many thanks to Prof. Alexandre F. Tenca, though I only sit in his digital design

  • bBlocks : a flexible object oriented microarchitecture simulation framework

    Creator:
    Hua, Ying
    Abstract:
    This research develops an object-oriented approach of modeling microprocessor architecture. A generic modeling library, bBlocks, is proposed as a framework for constructing microprocessor simulation. bBlocks is a collection of predefined abstract components (blocks) implemented in Java, the object-oriented programming language. Blocks are defined and used as the basic components in...
    Resource Type:
    Masters Thesis
    Full Text:
    Engineering class. I would like to thank Dr. Alexandre F. Tenca for serving as my committee member and his

  • The architecture of VIS multimedia extension

    Creator:
    Kwon, Young-Kyong
    Abstract:
    In the past, multimedia technology focused mainly on designing high quality audio and graphical imagery as well as providing adequate performance levels that the users demand for multimedia applications. However, the concept of multimedia has expanded into New-Media that involves variety use of multimedia data in consumer-oriented applications, such as...
    Resource Type:
    Masters Thesis
    Full Text:
    University. Also, special thanks to the committee members, Prof. Alexandre F. Tenca, Prof. Robert J. Simpson

  • Architectural support for multithreading on a 4-way multiprocessor

    Creator:
    Kim, Gwang-Myung
    Abstract:
    The microprocessors will have more than a billion logic transistors on a single chip in the near future. Several alternatives have been suggested for obtaining highest performance with billion-transistor chips. To achieve the highest performance possible, an on-chip multiprocessor will become one promising alternative to the current superscalar microprocessor. It...
    Resource Type:
    Masters Thesis
    Full Text:
    patience, this thesis would not have been possible. I would like to thank Dr. Alexandre F. Tenca, Dr

  • Multithreaded virtual processor on DSM

    Creator:
    An, Ho Seok
    Abstract:
    Modern superscalar processors exploit instruction-level parallelism (ILP) by issuing multiple instructions in a single cycle because of increasing demand for higher performance in computing. However, stalls due to cache misses severely degrade the performance by disturbing the exploitation of ILP. Multiprocessors also greatly exacerbate the memory latency problem. In SMPs,...
    Resource Type:
    Masters Thesis
    Full Text:
    thanks to the committee members, Prof. Alexandre F. Tenca, Prof. Kyoung Rok Cho, and Prof. Robert M

  • A resource-constrained scheduling scheme that considers resources operating at multiple voltages and register assignment

    Creator:
    Lee, Chee
    Abstract:
    Power and timing requirements are becoming more and more stringent as applications move from less mobile devices to more mobile ones. As such, it is important to optimize these applications as much as possible in order to provide the best solution that is low power and low latency. Although there...
    Resource Type:
    Masters Thesis
    Full Text:
    my committee, Professors Alexandre Tenca, Alexandre F.T. Yokochi, and Cetin Kaya Koc for taking the

  • SPICE models for flicker noise in p-MOSFET's and phase noise effects on oscillator circuits

    Creator:
    Zhou, Junlin, 1973-
    Resource Type:
    Masters Thesis
    Full Text:
    OSU. I would like to thank Dr. S. Subramanian and Dr. Alexandre Tenca for their teaching and

  • Implementation and performance analysis of a scalable routing protocol

    Creator:
    Venkatesan, Rudhrakumar
    Abstract:
    Ad Hoc networks are multi-hop wireless networks consisting of mobile hosts. They do not have any pre-existing network infrastructure and are characterized by constantly changing topology, limited battery power and bandwidth. Typical applications of such networks are battlefield networks, medical relief during natural calamities or disasters, conference room networking, and...
    Resource Type:
    Masters Thesis
    Full Text:
    way through the entire graduate program. I would like to thank Dr.Bella Bose, Dr.Alexandre Tenca and

  • Enhancing and profiling the AE32000 cycle accurate embedded processor simulator

    Creator:
    Megarajan, Balaji
    Abstract:
    The AE32000 processor core, developed by Advanced Digital Chips Inc., Korea, is used primarily in the embedded processing environment. The AE32000 simulator models this embedded processor core having high code density. An enhanced simulator was developed to study the performance of the present Instruction Set Architecture after comparison with the...
    Resource Type:
    Masters Thesis
    Full Text:
    day was extremely helpful. I also like to thank Dr. Alexandre Tenca, Dr. Roger Traylor and Dr

  • Performance improvement with logic-level speculation

    Creator:
    Liu, Tong
    Abstract:
    Current superscalar microprocessors' performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). Higher frequency is achieved with process advancement, new circuit techniques, and microarchitectural improvement. Number of instructions processed per cycle depends mainly on microarchitecture techniques that exploit parallelism both spatially...
    Resource Type:
    Dissertation
    Full Text:
    Weisshaar, Alexandre Tenca and Vivek De for been my committee members. I appreciate the entire electrical