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  • Automated verilog-to-layout synthesis of ADCs using custom analog cells

    Creator:
    Waters, Allen
    Abstract:
    A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize...
    Resource Type:
    Dissertation
    Full Text:
    procedure for automating the design and layout of analog-to-digital con- verters (ADCs) is presented. This

  • Micropower incremental analog-to-digital converters

    Creator:
    Chen, Chia-Hung
    Abstract:
    Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended counting with a Nyquist-rate ADC. A single-loop incremental ADC was designed and fabricated in 90 nm for a biosensor interface circuit. It incorporates one integrator,...
    Resource Type:
    Dissertation
    Full Text:
    .........................................................................................................3 2.2 The Analysis and Design of IADCs

  • A 1-m W, 14-bit [sigma] [delta] A/D converter with 10-KHz conversion rate

    Creator:
    Gupta, Shivani
    Resource Type:
    Masters Thesis
    Full Text:
    low- power. A design that focusses on the twin issues of precision and low power con- sumption is

  • Design of switched-current circuits for a bandpass delta-sigma modulator

    Creator:
    Manapragada, Praveen
    Resource Type:
    Masters Thesis
    Full Text:
    a switched-current bandpass delta-sigma modulator. This thesis presents the design and layout of a

  • Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter with 8X oversampling and 4 MHz Nyquist output rate

    Creator:
    Jiang, Ruoxin
    Abstract:
    In this dissertation, a new Δ∑ A/D converter is presented that is ideally suited for communication applications. It is based on a single-loop single-stage structure, which can realize a high maximum out-of-band quantization noise gain while maintaining stable operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order...
    Resource Type:
    Dissertation
    Full Text:
    , 2001. Title: Design of a 1.8-V 14-bit L I A/D Converter with 8X Oversampling and 4 MHz Nyquist Output

  • Low voltage switched capacitor circuits for lowpass and bandpass [delta sigma] converters

    Creator:
    Keskin, Mustafa
    Abstract:
    The most accurate method for performing analog signal processing in MOS (metal-oxide-semiconductor) integrated circuits is through the use of switched-capacitor circuits. A switched-capacitor circuit operates as a discrete-time signal processor. These circuits have been used in a variety of applications, such as filters, gain stages, voltage-controlled oscillators, and modulators. A...
    Resource Type:
    Dissertation
    Full Text:
    is to design and explore future low-voltage switched- capacitor circuits, which are crucial for

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    : Design Techniques for Low-Voltage and Low-Power Analog-to-Digital Converters. Abstract approved: Un-Ku

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
    Full Text:
    Corporation (SRC), the Center for Design of Analog and Digital Integrated Circuits (CDIDIC), Texas

  • Design of a 80/250-Msample/s FIR-filter for a pipelined ADC-FIR interface

    Creator:
    Stier, Hubert J.
    Resource Type:
    Masters Thesis
    Full Text:
    Master of Science in Electrical and Computer Engineering presented on May 3, 1995. Title: Design of a 80

  • Design techniques for low-voltage analog-to-digital converter

    Creator:
    Chang, Dong-Young
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low-voltage conditions. There are several well-known techniques to bypass the problem. These approaches include: (1)...
    Resource Type:
    Dissertation
    Full Text:
    a 0.35-tm CMOS process. It operates at 1.4V and consumes 21mW of total power. The second design is