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Filtering by: Creator Chang, C.-H. Remove constraint Creator: Chang, C.-H. Subject Metal oxide semiconductors, Complementary Remove constraint Subject: Metal oxide semiconductors, Complementary

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  • An efficient modeling approach for substrate noise coupling analysis with multiple contacts in heavily doped CMOS processes

    Creator:
    Özis, Hatice Dicle
    Abstract:
    A computationally efficient and accurate substrate noise coupling model for multiple contacts in heavily doped CMOS processes is presented and validated with simulations and experimental data. The model is based on Z parameters that are scalable with contact separation and size. This results in fast extraction of substrate resistances for...
    Resource Type:
    Masters Thesis
    Full Text:
    committee, Dr. Raghu Settaluri and Dr. Chih-hung Chang, both of whom have showed interest in my work. I am

  • Low power design techniques for analog-to-digital converters in submicron CMOS

    Creator:
    Musah, Tawfiq
    Abstract:
    Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially...
    Resource Type:
    Dissertation
    Full Text:
    21 A 1 C H R o2 Φ 2 G m2 R o2 Φ 22 V OUT C F C S Φ 1 Φ 2 V IN Φ 1 Φ 1

  • Design techniques for time based data converters

    Creator:
    Gande, Manideep
    Abstract:
    Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data converters which use time based processing. Another artifact of geometry scaling is the increase in complexity of digital circuitry available on traditional analog ICs, as...
    Resource Type:
    Dissertation
    Full Text:
    members Prof. Karti Mayaram, Prof. Gabor C. Temes, and Prof. Pavan Kumar Hanumolufor for serving on my

  • Design and computer-aided optimization of RF CMOS power amplifiers

    Creator:
    Gupta, Ravi
    Abstract:
    In recent years, there has been an extensive effort to develop low-cost implementations of radio frequency integrated circuits for consumer applications. This thesis is a research effort in the design and implementation of integrated RF CMOS Power Amplifiers (PAs). A significant challenge in the implementation of RF CMOS ICs is...
    Resource Type:
    Dissertation
    Full Text:
    optimization. We have also studied the operation of Class A, B and C power amplifiers and highlighted design

  • Design of 28 GHz Low-Power Phased-Array Receiver Frontend in CMOS

    Creator:
    Garg, Robin
    Abstract:
    This work presents the design and implementation of a low power phased-array receiver frontend at 28 GHz in 65 nm CMOS. The frontend incorporates a low- power low-noise amplifier(LNA) and a passive reflection-type phase shifter (RTPS) capable of providing 360° phase shift with 5-bit phase resolution and low loss variation....
    Resource Type:
    Masters Thesis
    Full Text:
    . Oh, S. Choi, C. W. Byeon, J. H. Son, J. H. Lee, and C. Y. Kim, “Low Insertion Loss, Compact 4-bit

  • Area efficiency improvement of CMOS charge pump circuits

    Creator:
    Perigny, Ryan
    Abstract:
    In this thesis, the literature relating to charge pump dc-dc converters and their uses is reviewed. Charge pumps are useful in many circuits, including low-voltage circuits, dynamic random access memory circuits, switched-capacitor circuits, EEPROM's and transceivers. The important issues relating to charge pump design are power efficiency, output voltage ripple...
    Resource Type:
    Masters Thesis
    Full Text:
    integrated circuits. C C 41 H II ,-J>-- v0 2HI II I C C C FIGURE 1.1. 5-stage Cockcroft-Walton charge

  • Power amplifier design in digital CMOS processes

    Creator:
    Forejt, Brett E.
    Abstract:
    The ability to integrate designs from board level, multi-chip modules to single process solutions is highly attractive in today's PC multimedia industry. Saving board area and chip count will decrease the production cost of personal computing hardware and increase profitability. The ability to integrate analog circuit capability and it's reference...
    Resource Type:
    Masters Thesis
    Full Text:
    ........................................................................................................... 26 (C) Power Supply Rejection Ratio

  • Design of sample and holds using CCDs in a standard CMOS process

    Creator:
    Ghatak, Kalyan Brata
    Abstract:
    The parasitic components of MOS switches at high speeds affect the linearity and resolution of CMOS sample and hold circuits. CCD-based circuit design can offer good performance at high speeds. This thesis presents the design of sample and hold circuits using charge-coupled device structures in a standard CMOS process. Three...
    Resource Type:
    Masters Thesis
    Full Text:
    stay at IBM Microelectronics, and I am grateful to Aria Eshraghi, Kishore Ganti, Danny Chang, Weinan

  • CMOS low noise amplifier design utilizing monolithic transformers

    Creator:
    Zhou, Jianjun J.
    Abstract:
    Full integration of CMOS low noise amplifiers (LNA) presents a challenge for low cost CMOS receiver systems. A critical problem faced in the design of an RF CMOS LNA is the inaccurate high-frequency noise model of the MOSFET implemented in circuit simulators such as SPICE. Silicon-based monolithic inductors are another...
    Resource Type:
    Dissertation
    Full Text:
    the Planck factor, given by hf / kT P(f) = (2.3)ehf/kT 1 where h is Planck's constant, 6.63 x 10

  • Low-power dynamic CMOS circuits in high-performance memory arrays

    Creator:
    Patwary, Md. Ataur R.
    Abstract:
    Dynamic CMOS circuits are commonly used in high-performance memory arrays to implement wide-NOR logic functions for their read and search operations. This is because dynamic circuits have significantly higher speed and lower area compared to static circuits for performing similar operations. Register File (RF) arrays are located at the top...
    Resource Type:
    Dissertation
    Full Text:
    A L L I S Yes Address out 0003 E U G E N E No ('0002) 0004 H I L L S B O R O No Search Data C O R