A new structure for the implementation of bit/serial adaptive IIR filter is
presented. The bit level system consists of gated full adders for the arithmetic
unit and data latches for the data path. This approach allows recursive
operation of the IIR filter to be implemented without any global
interconnections, minimal...
Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...