In Radio Frequency Integrated Circuits (RFIC) or high frequency digital
ICs, there is a demand to probe the internal nodes for testing. The ultra low
capacitance RFIC probe presented in his work is a flexible tool for these
applications. The probe utilizes the coupling between a tungsten needle and the...
This thesis discusses the design and evaluation of an instrument
that can detect known signals in noise. This detector uses
two integrators to sense a difference in the received signal between
half-cycles of the known signal.
The detector is useful for sensing signals in the approximate
frequency range of 100...
This thesis focuses on two aspects of transparent electronics, SnO₂ transparent thin-film transistors (TTFTs) and transparent circuits. Both depletion- and enhancement-mode SnO₂ TTFTs are realized. The maximum effective mobility for the depletion- and enhancement-mode devices are 2 cm²V⁻¹s⁻¹ and 0.8 cm²V⁻¹s⁻¹, respectively. A variety of techniques to decrease the carrier...
Sorting is typically a compute intensive operation used in many
areas of industry. With improved technology, both in the VLSI and CAE
areas, we can afford to develop hardware based database computers to
move the work load off the main computer. In this thesis the
architecture of a VLSI parallel...
This thesis is concerned with the development of a unique
parallel sort-merge system suitable for implementation in VLSI.
Two new sorting subsystems, a high performance VLSI sorter and a
four-way merger, were also realized during the development
process. In addition, the analysis of several existing parallel sorting
architectures and algorithms...
Strategies for simulation and measurement of substrate noise have been analyzed using various digital and analog circuits fabricated in the TSMC 0.35um heavily doped CMOS process. The measurements validate a substrate noise coupling macromodel that has been used to obtain the simulation results. The simulations and measurements also substantiate the...
Efficient methods for simulating the substrate noise generated by complex synchronous and asynchronous digital logic circuits are presented. By simulating digital logic at the gate level, and precharacterizing the gates, the substrate noise generation can be predicted and used in a transistor level simulation of the sensitive analog blocks. This...