In advanced integrated circuit (IC) processes, the metal fill inserted to meet foundry imposed density requirements degrades the performance of interconnects and passive components which ultimately affects the overall circuit performance. Accounting for this degradation through electromagnetic and equivalent circuit modeling is becoming a critical aspect of IC design. However,...
With increasing transistor operating frequencies, interconnects and passive devices are becoming performance limiters in integrated circuit (IC) designs. To combat this, the interconnect layers above the active silicon are trending toward low-κ dielectrics and Cu metallization. The use of these new materials has popularized chemical mechanical polishing (CMP) to planarize...