The main objective of this thesis is to investigate the microprocessor's
potentials to improve the productivity of Industrial
Engineers engaged in work design and measurement. More exactly, the
following four hypotheses were proposed and investigated:
(1) A Universal Time Data (UTD) structure could be used to
accommodate a variety of...
The system in this thesis uses multiple Intel iSBC86/12A cards
connected to the Intel Multibus. The system was written using the Intel
language PLM86. The final result is a low level debug tool that
provides the user with the following capabilities: examine/change
memory, examine/change processor registers, load a user written...
Typically, a Floating Point processor will be
attached to a general-purpose digital computer to extend
and enhance its numeric processing capabilities. In this
thesis a multiple instruction, multiple data machine for
the addition, subtraction, multiplication and division of
floating point numbers is presented. The algorithms used
have been partitioned to...
A relatively recent development in the late 1980s in processors has been the superscalar processor. Superscalar processors use multiple pipelines in an attempt to achieve higher performance than previous generations of processors. Having multiple pipelines makes it possible to execute more than one instruction per cycle. However, since instructions are...
Digital systems, in particular microprocessor, have recently experienced phenomena growth in performance. Both technology advancement and clever design have sustained this performance growth. As clock frequency heads into the Ghz range, new circuit design, for both logic and storage, are needed. Such new circuit technology must provide needed performance with...
Current superscalar microprocessors' performance depends on its frequency and the
number of useful instructions that can be processed per cycle (IPC). Higher frequency
is achieved with process advancement, new circuit techniques, and microarchitectural
improvement. Number of instructions processed per cycle depends mainly on
microarchitecture techniques that exploit parallelism both spatially...
The purpose of this thesis is to explore the design of a multimedia extension Instruction Set Architecture (ISA) for a reconfigurable processor. An Extendable Multimedia Module (EM3) was designed as an optional module for X32V. X32V is a prototype configurable processor simulator developed at Oregon State University by John Mark...
AE32000 microprocessor was developed mainly to address the need for the reduction in the amount of memory accesses in embedded applications. One of the primary goals of a computer architect is the design and construction of machines, that support the efficient execution of the programs that will run on them....
The design of high-performance, high-speed clock generation and distribution becomes challenging in terms of phase noise, jitter and power consumption, due to the fast development of communication and computing systems. Injection locking is a promising clocking technique since it can significantly improve the energy efficiency, suppress the phase noise of...
