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  • Techniques for improving timing accuracy of multi-gigahertz track/hold circuits

    Creator:
    Wang, Jingguang
    Abstract:
    Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8 bits resolution are used in many signal communication applications. Unfortunately, the performance of the high speed ADC is limited by the timing accuracy of the sampling clock. A small sampling uncertainty can cause a large error in the sampled voltage and result...
    Resource Type:
    Masters Thesis
    Full Text:
    /H circuit is a critical block in high speed ADC, and the timing accuracy is the main limitation to

  • Comparison and impact of substrate noise due to clocked and clockless circuitry

    Creator:
    Le, Jim K.
    Abstract:
    Delay insensitive asynchronous circuitry provides significant advantages with respect to substrate noise due to localized switching. The differences between the substrate noise from NULL Convention Logic (NCL) and traditional Clocked Boolean Logic (CBL) are described and analyzed based on measured results. A test chip fabricated in the TSMC 0.25 um...
    Resource Type:
    Masters Thesis
    Full Text:
    Held for the 8051 board, and Triet Le for the delta-sigma design. Aside from research, I’m very

  • Design techniques for clocking high performance signaling systems

    Creator:
    Hanumolu, Pavan Kumar
    Abstract:
    Scaling of CMOS technology has progressed relentlessly for the past several decades. In order for this unprecedented scaling to benefit the performance of large digital systems, the communication bandwidth between integrated circuits (ICs) must scale accordingly. However, interconnect technology does not scale as aggressively, making communication between chips the major...
    Resource Type:
    Dissertation
    Full Text:
    circuit design and in life. Arun Rao did the best favor I could ask of him by introducing me to

  • Embedded passives in a multilayer medium

    Creator:
    Seo, Yongseok, 1958-
    Abstract:
    Recent advances in high density low cost RF and microwave three dimensional integration technologies using LTCC(Low Temperature Cofired Ceramics), laminate and other multilayer hybrid and integrated circuits have increased interest in the design of embedded passive components such as inductors, capacitors and filters. The purpose of this study is to...
    Resource Type:
    Dissertation
    Full Text:
    circuit as well as electromagnetic models have been used to analyze and design these structures. In this

  • Low noise FSCL digital circuits for decimation filter

    Creator:
    Wong, Man Wa
    Abstract:
    A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed to implement the digital section of mixed-signal IC applications. This FSCL circuit technique offers the advantage of low overlap current spikes during the switching transitions of conventional CMOS gates. This overlap current spike has become one of...
    Resource Type:
    Masters Thesis
    Full Text:
    decimation filter 12 3.2 Input and output timing diagram of the decimation filter 13 3.3 Block diagram of

  • Reaction kinetics and mass transport in the electroless deposition of copper

    Creator:
    Ninosky, Joseph M.
    Resource Type:
    Masters Thesis
    Full Text:
    and Mass Transport in the Electroless Deposition of Copper. Milo Koretsky Electroless copper

  • Low power scheduling schemes that consider latency and resource constraints at multiple voltages

    Creator:
    Huang, Shyh-Sen
    Abstract:
    Power reduction can be achieved at many different levels, such as architecture, algorithm, logic, and transistor levels in circuit design. This thesis focuses on low power scheduling at the algorithm level. We present a latency-constrained scheduling and a latency and resource constrained scheduling, which minimize power consumption for the resources...
    Resource Type:
    Masters Thesis
    Full Text:
    (algorithm), logic, circuit, and layout level. The process to design a low-power system has been

  • Switched-current logic for digital circuit design

    Creator:
    Subramanian, Vivek
    Resource Type:
    Masters Thesis
    Full Text:
    Switched-current logic for digital circuit design AN

  • Component to multi-track feeder assignment and board sequencing for printed circuit board assembly

    Creator:
    Li, Yu-An
    Abstract:
    This research was motivated by the use of multi-track feeders in the printed circuit board (PCB) assembly. In a low volume, high mix production environment, setup time is usually considered more important than processing time. Implementation of multi-track feeders not only increases the capacity of the surface mount machines but...
    Resource Type:
    Dissertation
    Full Text:
    -Track Feeder Assignment And Board Sequencing For Printed Circuit Board Assembly Abstract approved

  • Low-voltage switched-capacitor circuits

    Creator:
    Bidari, Emad
    Abstract:
    In recent years, the rapidly growth of CMOS technology has evolved towards submicron and deep-submicron features. Due to smaller device sizes, and significant demand for low-power designs, the maximum allowable power supply voltage is restricted. So far, two solutions; clock boosting and switched opamp schemes have been proposed. The material...
    Resource Type:
    Masters Thesis
    Full Text:
    and constructive critiques that put me a step ahead in understanding analog circuit design. I thank