The focus of this thesis involves development of highly transparent, n-channel, accumulation- mode thin-film transistors employing a zinc tin oxide (ZTO) channel layer. ZTO-based transparent thin-film transistors (TTFTs) show improved device performance compared to ZnO-based TTFTs. An estimated peak effective mobility for these devices as high as ~100 cm² V⁻¹sec⁻¹...
The objective of this thesis is to provide an initial demonstration of the feasibility of constructing highly transparent active electronic devices. Such a demonstration is successfully achieved in the fabrication of ZnO-based thin film transistors (TFTs) exhibiting transparency greater than ~90% in the visible portion of the electromagnetic spectrum and...
The objective of this thesis is to contribute to the development of p-type materials for transparent electronics applications. Thin films of ®-BaCu2S2, a p-type semi-transparent semiconductor, are fabricated and characterized. ®-BaCu2S2 has a transmittance of 60% to 80 % in the visible portion of the electromagnetic spectrum. The mobility, conductivity,...
Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) constitute the central theme of this thesis. Within this theme, three primary areas of focus are pursued.
The first focus is the realization of a transparent three-stage ring oscillator with buffered output and an output frequency in the megahertz range. This leads to...
Decision feedback equalization (DFE) is a sampled-data technique used for data recovery in digital communications channels. Multi-level decision feedback equalization (MDFE) has been developed for channels using the 2/3(1,7) RLL code.
The optimum detector for a digital communication channel affected by ISI and noise consists of a matched filter, followed...
In recent years, a new class of high-performance thin-film transistors (TFTs) has emerged comprising amorphous oxide channel materials composed of heavy-metal cations (HMCs) with (n-1)d¹⁰ns⁰ (n ≥ 4, where 'n' refers to the row of the periodic table) electronic configuration. This thesis is devoted to the fabrication and characterization of...
This thesis describes the adder to be used with the Galaxy computer, which is to be constructed at Oregon State University.
The need for faster, more reliable adders is discussed
along with previous adder designs related to the
Galaxy Fast Carry Adder.
Both the logical design and circuit design of...
The concept of combining arithmetic and memory capability on
a single semiconductor chip has become practical from a system's
viewpoint through the decreased cost of semiconductor memories and
high circuit densities achieved through large scale integration. This
paper describes a model for studying the feasibility of such systems.
An arithmetic-memory...
Research in digital computers takes two paths: one uses the
computer as a tool to reach certain objectives; on the other, the computer
itself is the object of research. The NEBULA computer was
built with the latter in mind. The system design and logical design
are described here in detail....
Scaling of CMOS technology has progressed relentlessly for the past several
decades. In order for this unprecedented scaling to benefit the performance of
large digital systems, the communication bandwidth between integrated circuits
(ICs) must scale accordingly. However, interconnect technology does not scale as
aggressively, making communication between chips the major...