As Moore’s Law continues to give rise to ever shrinking channel lengths, circuits are becoming more digital and ever increasingly faster. Generating high frequency clocks in such scaled processes is becoming a tough challenge. Digital phase locked loops (DPLLs) are being explored as an alternative to conventional analog PLLs but...
Engineering students spend a significant amount of their undergraduate careers focused on technical theory and practice. This intensive student prepares them for their technical challenges in the future. This training is so intense that often the more 'soft skills' such as communication, leadership, design, and troubleshooting are left out or...
Digitally controlled switching DC-DC converters have recently emerged as an attractive alternative to conventional switching converters based on analog control techniques. This research focuses on eliminating the issues associated with the state of the art switching converters by proposing three novel control techniques: (1) a digitally controlled Buck-Boost converter uses...
Low power, high speed serial transceivers are employed in a wide range of applications ranging from chip-to-chip, backplane, and optical interconnects. Apart
from being capable of handling a wide range of data rates, the transceivers should
have low power consumption (mW/Gbps) and be fully integrated. This work
discusses enabling techniques...
Desire for low-power, high performance computing has been at core of the symbiotic union between digital circuits and CMOS scaling. While digital circuit performance improves with device scaling, analog circuits have not gained these benefits. As a result, it has become necessary to leverage increased digital circuit performance to mitigate...