Graduate Thesis Or Dissertation

 

Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters Public Deposited

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/5h73q007w

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  • This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal interstage gain for a given set of specifications. The proposed technique can then be used to implement an ADC with a generalized, non-binary interstage gain, while maintaining the robustness of design in the face of various circuit non-idealities and errors. It is also shown that the existing design techniques are merely a special case of this generalized design scheme, which blends seamlessly with these without raising design cost or complexity. The effectiveness of the proposed technique is verified rigorously through simulations. Also, examples are presented illustrating the relevance of this approach and the advantages offered by it when compared to the existing techniques for design of high-performance pipelined ADCs for high-resolution applications.
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  • description.provenance : Approved for entry into archive by Linda Kathman(linda.kathman@oregonstate.edu) on 2009-01-27T14:40:06Z (GMT) No. of bitstreams: 1 Vivek_Sharma.pdf: 727085 bytes, checksum: 97cd845793c890cb9f30fe7e354f74de (MD5)
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  • description.provenance : Approved for entry into archive by Linda Kathman(linda.kathman@oregonstate.edu) on 2009-01-27T14:41:35Z (GMT) No. of bitstreams: 1 Vivek_Sharma.pdf: 727085 bytes, checksum: 97cd845793c890cb9f30fe7e354f74de (MD5)
  • description.provenance : Submitted by Philip Vue (vuep@onid.orst.edu) on 2009-01-26T23:00:34Z No. of bitstreams: 1 Vivek_Sharma.pdf: 727085 bytes, checksum: 97cd845793c890cb9f30fe7e354f74de (MD5)

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