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Filtering by: Creator Carney, D. L. Remove constraint Creator: Carney, D. L. Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Advisor Mayaram, Kartikeya Remove constraint Advisor: Mayaram, Kartikeya

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  • Ultra-low energy digital logic controller design for wireless sensor networks

    Creator:
    Meliza, Stephen W.
    Abstract:
    Low energy design techniques for digital circuits are examined to determine their suitability for use in a digital logic controller for wireless sensor network nodes. Transistor level simulations are used to evaluate the techniques and those demonstrating an energy reduction are used to implement a digital logic controller. The digital...
    Resource Type:
    Masters Thesis

  • Analysis and Design of Low Voltage LC Oscillators and their Application to Wireless Sensor Networks

    Creator:
    Guha Roy, Ankur
    Abstract:
    This dissertation focuses on the analysis, design, and application of inductor-capacitor (LC) oscillators for wireless sensor networks (WSNs). First an analysis and design optimization approach for enhanced swing, low power CMOS LC oscillators is presented. A phasor based analysis is used for determining the amplitude and phase noise of these...
    Resource Type:
    Dissertation
    Full Text:
    illators fo uses on a new enhan ed swing lass-D VCOwhi h operates from a supply voltage as low as 300 mV

  • Automated analysis, design, and optimization of low noise oscillators

    Creator:
    Vytyaz, Igor
    Abstract:
    Low noise oscillators are universally needed in digital systems for clock generation and synchronization, and in radio-frequency communication front-ends for frequency up- and down-conversion. Noise in oscillators results in timing jitter, and limits the clock frequency of digital systems. In radio-frequency communication systems, phase noise in oscillators lowers the signal-to-noise...
    Resource Type:
    Dissertation
    Full Text:
    affected by a change in the parameter. An example for fixed x2 is shown in (c) and (d

  • A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4 GHz LNA's

    Creator:
    Hazenboom, Duncan S.
    Abstract:
    Three types of low noise amplifiers operating at 2.4GHz were designed. They are the commonly used single-ended and differential amplifiers as well as a new quasi-differential amplifier. The substrate noise injected into these amplifiers is examined for both heavily and lightly doped CMOS substrates. For the single-ended amplifier the noise...
    Resource Type:
    Masters Thesis
    Full Text:
    ------,------i;:::=====:::;--i ~ -70 I E O'.l u ';:' -80 ., 6 D.. -90 2.4 Frequency (Hz) +2

  • A test fixture and deembedding procedure for high-frequency substrate characterization

    Creator:
    Webb, Kyle M.
    Abstract:
    At frequencies exceeding 1-2 GHz, the substrate network models used in substrate coupling simulation must account for the reactive nature of the substrate. Unlike at low frequencies, where the purely resistive substrate models can be validated through DC resistance measurements, these high-frequency models, comprising reactive components, must be validated through...
    Resource Type:
    Masters Thesis
    Full Text:
    , (b) self susceptance, (c) mutual con- ductance, and (d) mutual susceptance

  • Ground tap placement and sizing to minimize substrate noise coupling in RF LNAs

    Creator:
    Sundaresan, Arathi
    Abstract:
    The substrate noise injected by a stepped buffer circuit into two single-ended 1.5GHz low noise amplifiers is examined for a heavily doped 0.25µm CMOS process. The difference in the LNA noise rejection is characterized as a function of the size and placement of substrate contacts. The use of a resistive...
    Resource Type:
    Masters Thesis
    Full Text:
    Appendix D Additional Test Cases for Analyzing the Influence of Substrate Contact Sizing

  • Contributions to substrate noise due to supply coupling and pin parasitics

    Creator:
    Adluri, Sirisha
    Abstract:
    This thesis presents the contributions to substrate noise due to supply coupling and the effect of pin parasitics on the substrate noise generated by digital circuits. Various sources of substrate noise and their effect on analog circuits sharing the same substrate are discussed. A simulation approach to isolate the various...
    Resource Type:
    Masters Thesis
    Full Text:
    kHz. (d) Supply inductance 1 OnH, input frequency = 10 MHz

  • Comparison and impact of substrate noise due to clocked and clockless circuitry

    Creator:
    Le, Jim K.
    Abstract:
    Delay insensitive asynchronous circuitry provides significant advantages with respect to substrate noise due to localized switching. The differences between the substrate noise from NULL Convention Logic (NCL) and traditional Clocked Boolean Logic (CBL) are described and analyzed based on measured results. A test chip fabricated in the TSMC 0.25 um...
    Resource Type:
    Masters Thesis
    Full Text:
    −0.2 −0.1 0 0.1 0.2 Time (sec) M ag n it u d e (V ) 0 0.2 0.4 0.6 0.8 1 x 10 −6 −0.3

  • Modeling and simulation methods for RF MEMS VCOs

    Creator:
    Sankaranarayanan, Janakiram Ganesh
    Abstract:
    This work focusses on the modeling and the development of efficient coupled simulation techniques for MEMS based RF oscillators. High-level models for MEMS based varactors have been discussed and their accuracy issues are identified, based on comparisons with numerical simulations. A faster simulation approach based on the time-domain shooting method...
    Resource Type:
    Masters Thesis
    Full Text:
    itself and are given in (2.7) and (2.8), respectively [11]. kcant = 2EW 3 ( t L )3 (2.7) 10 and

  • Design techniques for radiation hardened-phase locked loops

    Creator:
    Nemmani, Anantha Nag
    Abstract:
    Spacecrafts experience radiation in the course of their operation and all electronic equipment on board these spacecrafts has to be designed to withstand the effects of this radiation. This thesis describes the effects of total ionization dose (TID) and single event transients (SET) in phase-locked loops - an important circuit...
    Resource Type:
    Masters Thesis
    Full Text:
    likely to be hit than a smaller device. On the other hand, a larger device has 10 N D UR V PFD