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Filtering by: Subject Digital-to-analog converters Remove constraint Subject: Digital-to-analog converters Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Degree Level Master's Remove constraint Degree Level: Master's

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  • Low-power high-linearity digital-to-analog converters

    Creator:
    Kuo, Ming-Hung
    Abstract:
    In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB) + 6 (MSB) segmented architecture to achieve high performance for minimum area. The implemented LSB DAC is based on quasi-passive pipelined DAC that has been...
    Resource Type:
    Masters Thesis
    Full Text:
      2.1 Digital-to-Analog Converter

  • A comparative study of lowpass continuous-time delta-sigma modulators with pulse-shaped DACs

    Creator:
    Fang, Jie
    Abstract:
    Recently, continuous-time ΔΣ modulators are appearing increasingly often in both the literature and the marketplace due to their features of inherent antialiasing and relaxed requirements for opamp and so on. However, several nonideal factors such as clock jitter, excess loop delay, inter-symbol interference and so on, degrade the SNR performance...
    Resource Type:
    Masters Thesis
    Full Text:
    so on. Thanks to CDADIC (National Science foundation Center for Design of Analog-Digital

  • A MOSCAP pipeline pseudo passive DAC

    Creator:
    Behera, Prachee Shree
    Abstract:
    The design of a 10-bit pipelined charge redistribution DAC employing MOSCAPs biased in their accumulation mode is presented in this thesis. A switched capacitor filter and output buffer have also been designed for the system. The effect of MOSCAP nonlinearity on the performance of the pipelined charge redistribution DAC has...
    Resource Type:
    Masters Thesis
    Full Text:
    redistribution digital to analog converter (Q-DAC) have been investigated. The Q-DAC was first presented in [1

  • Low Frequency Oscillation Reduction Algorithm for Six-step Operation of Three-Phase Inverters

    Creator:
    Ke, Ziwei
    Abstract:
    A power inverter, or inverter, is an electronic device or circuitry that converts direct currents (DC) to alternating currents (AC) in the power electronics family. A three-phase inverter converts DC current to three-phase AC current. Inverters, especially three-phase inverters, have been widely used in many fields including renewable energy applications...
    Resource Type:
    Masters Thesis
    Full Text:
    through sensors, provides appropriate control signals to the power converter. A digital signal processor

  • Limitations and optimization of a blind calibration algorithm for nonlinearity in analog to digital converters

    Creator:
    Coker, Brandilyn
    Abstract:
    Analog to digital converters (ADCs) are a critical part of communication between the physical world and the increasingly digital systems humans use every day. ADCs have inherent non-idealities that degrade performance. Nonlinearity is one of the most prevalent non-idealities that designers face. While calibration methods for nonlinearity exist in the...
    Resource Type:
    Masters Thesis
    Full Text:
    Bibliography 38 LIST OF FIGURES Figure Page 2.1 Symbol for an Analog to Digital Converter

  • Compensation method of the excess loop delay in continuous-time delta-sigma ADCs based on model matching approach

    Creator:
    Guo, Jia
    Abstract:
    Continues-Time (CT) Delta-Sigma (ΔΣ) Analog-to-Digital Converters (ADCs) have one important constrain, namely the excess loop delay. Most previous excess lop delay compensation methods need to know the exact value of the excess loop delay in advance. However, the value of the excess loop delay is a uniformly distribution random variable....
    Resource Type:
    Masters Thesis
    Full Text:
    ΔΣ ADCs In the ideal theoretical sense, the quantizer and DAC (digital-to-analog converter) will

  • Design of high-performance pipeline analog-to-digital converters in low-voltage processes

    Creator:
    Myers, Charles Grant
    Abstract:
    Pipeline analog-to-digital converters (ADCs) have long been used in high-speed systems for power-efficient data conversion. Broadband communication and video processing systems are placing high demands on converter accuracy and speed (above 14 bits and in the multiple-MHz range). The increasing converter requirements coupled with lower supply voltages in modern processes...
    Resource Type:
    Masters Thesis
    Full Text:
    functional circuit block known as the MDAC (Multiplying-Digital-to-Analog Converter). Vin A/D D/A MDAC

  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    Cyclic Analog-Digital Converters. Abstract approved: Gabor C. Temes and Un-Ku Moon This thesis

  • Data driven optimization in SAR ADC

    Creator:
    Leung, Jerry
    Abstract:
    Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques have been adopted to process signals with low activity periods, such as biomedical and industrial sensors. Prior work used least- significant bit first quantization (LSBFQ)...
    Resource Type:
    Masters Thesis
    Full Text:
    Successive approximation register (SAR) analog to digital converter (ADC) is uti­ lized in many modern day

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis
    Full Text:
    ............................................................... 7 3. Analog-to-Digital Converter Architectures