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Filtering by: Subject Integrated passive components -- Design and construction Remove constraint Subject: Integrated passive components -- Design and construction Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Degree Name Master of Science (M.S.) Remove constraint Degree Name: Master of Science (M.S.)

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  • Design of compact folded-line RF power dividers

    Creator:
    Lim, Chi-young
    Abstract:
    Embedded passives in multi-layer media have gained importance for offering an attractive solution to the implementation of off-chip passive components in RF and mixed signal circuits, especially for wireless applications. Among the passive devices, power dividers and combiners are extensively used for a host of applications including balanced mixers, phase...
    Resource Type:
    Masters Thesis

  • Low power scheduling schemes that consider latency and resource constraints at multiple voltages

    Creator:
    Huang, Shyh-Sen
    Abstract:
    Power reduction can be achieved at many different levels, such as architecture, algorithm, logic, and transistor levels in circuit design. This thesis focuses on low power scheduling at the algorithm level. We present a latency-constrained scheduling and a latency and resource constrained scheduling, which minimize power consumption for the resources...
    Resource Type:
    Masters Thesis
    Full Text:
    FIGURES Figure Page 1. Design Flow and the Levels of Abstraction

  • Analysis and modeling of single-ended and differential spiral inductors in silicon-based RFICs

    Creator:
    Watson, Adam C.
    Abstract:
    A new comprehensive wide-band compact modeling methodology for single-ended spiral inductors and differential spiral inductors is presented. The new modeling methodology creates an equivalent circuit model consisting of frequency-independent circuit elements for use in circuit simulators. A fast automated extraction procedure is developed for determining the circuit element values from...
    Resource Type:
    Masters Thesis
    Full Text:
    creation of "System on Chip" (SoC) and "Application Specific Integrated Circuits" (ASIC). The SoC design

  • Metal fill considerations for on-chip interconnects and spiral inductors

    Creator:
    Shilimkar, Vikas S.
    Abstract:
    Variability in circuit performance due to process defects is a major concern in integrated circuit (IC) fabrication. Advanced IC manufacturing processes employ Chemical-Mechanical Polishing (CMP) for planarization of oxide and metal layers. CMP defects result in variations in the oxide and metal topographical profile. To reduce these topographical variations, electrically...
    Resource Type:
    Masters Thesis
    Full Text:
    advancements in integrated circuits (IC) technologies, design, and fabri- cation have significantly improved

  • Low voltage techniques for pipelined analog-to-digital converters

    Creator:
    Carnes, Joshua Kenneth
    Abstract:
    To realize pipelined ADCs in deep-submicron processes, low voltage techniques must be developed to work around problems created by limited supply voltages such as the floating switch dead zone, reduced SNR, and reduced OpAmp performance. This thesis analyzes standard and low voltage design issues for pipelined ADCs and proposes a...
    Resource Type:
    Masters Thesis
    Full Text:
    and low voltage design issues for pipelined ADCs and proposes a fully-differential implementation of

  • Characterization of a digital phase locked loop and a stochastic time to digital converter

    Creator:
    Geissenhainer, Erik D.
    Abstract:
    A digital phase locked loop (DPLL) and a statistical time-to-digital converter (STDC) were previously fabricated in a 0.35µm, 3.3V SOI CMOS process. This work summarizes these designs and characterizes the measured performance. Simulations supplement the measurements where applicable. The DPLL was found to reach a locked state under a limited...
    Resource Type:
    Masters Thesis
    Full Text:
    , there is a desire to combine the PLL circuitry and other system components onto a single integrated

  • Analysis and modeling of multi-mode effects in coplanar waveguide bends

    Creator:
    Senguttuvan, Rajarajan
    Abstract:
    A novel method for modeling bends in coplanar waveguides (CPWs) is described. The CPW can be viewed as a pair of parallel coupled quasi-slot lines. Bends in the CPW are modeled as a non-uniform coupled line system in terms of their even- and odd- mode characteristics. This modeling approach is...
    Resource Type:
    Masters Thesis
    Full Text:
    flexibility in the design of CPWs for RF circuits and integration with other components on the circuit board

  • An enhanced swing differential Colpitts CMOS VCO for low-voltage operation

    Creator:
    Farahbakhshian, Farhad
    Abstract:
    An enhanced swing differential Colpitts VCO (ESDC-VCO) dramatically improves the swing of a Colpitts VCO by allowing the signal to swing below ground and above the supply voltage. Fabricated in a 1P8M 0.13 um CMOS process, the ESDC-VCO operates at 4.9GHz with a 0.475-V supply and consumes 2.7mW. The measured...
    Resource Type:
    Masters Thesis
    Full Text:
    (WPAN) [1], and wireless sensor networks [2], require low-power RF integrated circuit designs to reduce

  • Electrical recommendations and formulas for metal fill in radio-frequency integrated circuits

    Creator:
    Gaskill, Steven
    Abstract:
    With increasing transistor operating frequencies, interconnects and passive devices are becoming performance limiters in integrated circuit (IC) designs. To combat this, the interconnect layers above the active silicon are trending toward low-κ dielectrics and Cu metallization. The use of these new materials has popularized chemical mechanical polishing (CMP) to planarize...
    Resource Type:
    Masters Thesis
    Full Text:
    Recommendations and Formulas for Metal Fill in Radio-Frequency Integrated Circuits Abstract approved: Andreas

  • Ultra low capacitance RFIC probe

    Creator:
    Jacob, Michael E.
    Abstract:
    In Radio Frequency Integrated Circuits (RFIC) or high frequency digital ICs, there is a demand to probe the internal nodes for testing. The ultra low capacitance RFIC probe presented in his work is a flexible tool for these applications. The probe utilizes the coupling between a tungsten needle and the...
    Resource Type:
    Masters Thesis
    Full Text:
    performance. Chapter three (RFIC Probe Design) discusses the design procedure. Construction details and