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Filtering by: Creator Hobbs, P. V. Remove constraint Creator: Hobbs, P. V. Academic Affiliation Electrical and Computer Engineering Remove constraint Academic Affiliation: Electrical and Computer Engineering Committee Member Bose, Bella Remove constraint Committee Member: Bose, Bella

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  • Implementation and performance analysis of a scalable routing protocol

    Creator:
    Venkatesan, Rudhrakumar
    Abstract:
    Ad Hoc networks are multi-hop wireless networks consisting of mobile hosts. They do not have any pre-existing network infrastructure and are characterized by constantly changing topology, limited battery power and bandwidth. Typical applications of such networks are battlefield networks, medical relief during natural calamities or disasters, conference room networking, and...
    Resource Type:
    Masters Thesis
    Full Text:
    : Implementation and Perfoice nalysis of a Scalable Routing Protocol Abstract approved P. Singh Ad Hoc networks

  • A pipelined baseband digital predistortion architecture for RF amplifier linearization

    Creator:
    Xu, Xiangqing
    Abstract:
    This thesis describes the design of a baseband digital predistortion architecture for radio frequency (RF) amplifier linearization. Existing amplifier linearization techniques are first examined. The nonlinearity of an amplifier can be characterized as amplitude-to-amplitude distortion and amplitude-to-phase distortion. The distortion can be corrected by providing a predistorted driver signal (both...
    Resource Type:
    Masters Thesis
    Full Text:
    256 K ROM2 P/R 9 ROM2_CS Conversion table9 ROM2_R 9 Stage 5 Id Qsd Qd PRC LD_outDRomi v but

  • Efficient arithmetic using self-timing

    Creator:
    Ramachandran, Ravichandran
    Abstract:
    The recent advances in VLSI technology have facilitated feature shrinking and hence a rapid increase in the levels of integration at the chip level. This increase in the level of integration has brought along with it a host of other constraints, the most crucial being timing management and increased power...
    Resource Type:
    Masters Thesis
    Full Text:
    signals Rin, Rout, Ain and Aout indicate the handshaking signals. Data_in Data out Data_in Block A V

  • A programmable network interface unit for hybrid meshnet local area networks

    Creator:
    Merchant, Shashank C.
    Abstract:
    A Hybrid Meshnet LAN, a new local area network architecture, has been proposed by Dr. Cheoul-Shin Kang and Dr. James Herzog. It provides for distributed control hybrid architecture which is good for effective load sharing under various local area network environments. Hybrid Meshnet has a dual channel structure, a token...
    Resource Type:
    Masters Thesis

  • Cluster partitioning approaches to parallel Monte Carlo simulation on multiprocessors

    Creator:
    Ranawake, Udaya A.
    Abstract:
    We consider the parallelization of Monte Carlo algorithms for analyzing numerical models of charge transport used in semiconductor device physics. Parallel algorithms for the standard k-space Monte Carlo simulation of a three band model of bulk GaAs on hypercube multicomputers are first presented. This Monte Carlo model includes scattering due...
    Resource Type:
    Dissertation
    Full Text:
    define it as follows. The task-to-processor mapping is a function M : V + P, where M(i) gives the

  • Data-structure builder for VLSI/CAD software

    Creator:
    Eum, Doo-hun
    Abstract:
    Relational database systems have successfully solved many business data processing problems. The primary reason of this success is that the relational data model provides a simple, yet flexible view of data as tables. In studying VLSI/CAD data, we noticed that they are often represented in formats similar to relational tuples....
    Resource Type:
    Dissertation
    Full Text:
    -statement. 24 V. ADDITIONAL EXAMPLES 30 5.1 Vic (View an Integrated Circuit Layout) 30 5.2 Preprocessing 33

  • Scheduling system of affine recurrence equations by means of piecewise affine timing functions

    Creator:
    Mui, Lap K.
    Abstract:
    Many systematic methods exist for mapping algorithms to processor arrays. The algorithm is usually specified as a set of recurrence equations, and the processor arrays are synthesized by finding timing and allocation functions which transform index points in the recurrences into points in a space-time domain. The problem of scheduling...
    Resource Type:
    Masters Thesis
    Full Text:
    8 44 Figure 9 DG for v showing flow of data u 45 Figure 10 DG for v showing flow of data v 45

  • A programmable system scheduler for control oriented local area networks (COLAN)

    Creator:
    Lim, Choo-chiang
    Abstract:
    The Control-Oriented Local Area Network (COLAN) is a distributed control system for a series of networked microcontrollers, which has been under development at Oregon State University since 1986. A reliable master controller, functioning both as a task scheduler and as a network controller, is required to allow users to perform...
    Resource Type:
    Masters Thesis
    Full Text:
    or offices. The first COLAN was developed in 1986 by Y. P. Zheng [ZHEN 86]. Since that time five

  • Concurrent message transmission on short delay ring networks

    Creator:
    Xu, Mingcheng
    Abstract:
    Two new medium access protocols for ring type local area networks, CTR (Concurrent Token Ring) protocol and DRUID (Destination Removal withoUt Intermediate node Delay) ring protocol, are proposed, designed and analyzed. A destination partial removal technique is designed and used in these two protocols to support concurrent message transmission and...
    Resource Type:
    Dissertation

  • A multiprocessor node for communication and control

    Creator:
    Atluri, Venkata Ram
    Abstract:
    This paper describes the design and implementation of "A multiprocessor node for communication and control" (MPCC). MPCC is a high speed, high performance local area network capable of performing real time control tasks. This is achieved by the concurrent operation of two 8051 microcontrollers, a dual port RAM and the...
    Resource Type:
    Masters Thesis
    Full Text:
    form of a command packet is : { NN P TT Q DD / }. The individual elements of the command packets are