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Filtering by: Creator Breen, Patrick J. Remove constraint Creator: Breen, Patrick J. Advisor Fiez, Terri S. Remove constraint Advisor: Fiez, Terri S. Rights Statement In Copyright Remove constraint Rights Statement: In Copyright

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  • Silencer! : a tool for substrate noise coupling analysis

    Creator:
    Birrer, Patrick
    Abstract:
    This thesis presents Silencer!, a fully automated, schematic-driven tool for substrate noise coupling simulation and analysis. It has been integrated in the CADENCE DFII environment and seamlessly enables substrate coupling analysis in a standard mixed-signal design flow. Silencer! aids IC designers in the analysis of substrate noise coupling at different...
    Resource Type:
    Masters Thesis
    Full Text:
    THESIS OF Patrick Birrer for the degree of Master of Science in Electrical and Computer Engineering

  • Ultra-low-energy transmitters for battery-free wireless sensor networks

    Creator:
    Panitantum, Napong
    Abstract:
    As the number of autonomous data collection applications keep increasing, the demand for wireless sensor networks (WSNs) has seen explosive growth. In this dissertation, an ultra-low-energy WSN transmitter is developed to reduce the energy consumption of sensor nodes in WSNs. With an ultra-low-energy transceiver, it is possible to eliminate the...
    Resource Type:
    Dissertation

  • Ultra-low power receivers for wireless sensor networks

    Creator:
    Ayers, James S.
    Abstract:
    In wireless sensor network applications, low-power operation of the wireless receiver is critical. To address this need an ultra-low power Binary Frequency Shift Keying (BFSK) receiver using the super-regenerative architecture is developed. A prototype receiver is built and tested for operation in the 900 MHz ISM band. Lab measurements show...
    Resource Type:
    Dissertation

  • Ultra-low energy digital logic controller design for wireless sensor networks

    Creator:
    Meliza, Stephen W.
    Abstract:
    Low energy design techniques for digital circuits are examined to determine their suitability for use in a digital logic controller for wireless sensor network nodes. Transistor level simulations are used to evaluate the techniques and those demonstrating an energy reduction are used to implement a digital logic controller. The digital...
    Resource Type:
    Masters Thesis
    Full Text:
    , Patrick Chiang and Dr. Ethan Minot, for their time and support. I thank my professors, especially Roger

  • Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates

    Creator:
    Hsu, Shu-ching
    Abstract:
    This thesis examines substrate noise coupling for NMOS transistors in heavily doped substrates. The study begins with the analysis of an NMOS transistor switching noise in a digital inverter at the device level. A resistive substrate network for the NMOS transistor is proposed and verified. Coupling between N+- P+ contacts...
    Resource Type:
    Masters Thesis
    Full Text:
    research at OSU. Many thanks to my colleagues, Sirisha Adluri, James Ayers, Patrick Birrer, Husni Habal

  • Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates

    Creator:
    Sharma, Ajit
    Abstract:
    This thesis presents an automated methodology to calibrate the substrate profile for accurate prediction of substrate parasitics using Green's function based extractors. The technique requires fabrication of only a few test structures and results in an accurate three layered approximation of a heavily doped epitaxial silicon substrate. The obtained substrate...
    Resource Type:
    Masters Thesis
    Full Text:
    , Patrick Birrer, Brian Owens and Sirisha for all the help and cooperation on the substrate coupling

  • Design of a variable gain, high linearity, low power baseband filter for WLAN transmitters

    Creator:
    Ranganathan, Sachin
    Abstract:
    A variable gain, high linearity, low power baseband filter for WLAN applications is implemented in a 1.5 V 3 V 0.15 μm CMOS process. This fourth-order low-pass filter, which is introduced in the transmit channel as a reconstruction filter between the D/A converter and the mixer, has a measured cut-off...
    Resource Type:
    Masters Thesis
    Full Text:
    , Zhimin, Volodymyr, Taras, Chenggang, Yutao, Shengjun, Kalyan, Vinay, Ravikanth, Ajit and Patrick for the

  • An efficient and accurate method of estimating substrate noise coupling in heavily doped substrates

    Creator:
    Arunachalam, Sasi Kumar S.
    Abstract:
    This thesis presents a Z-parameter based model to predict the substratenoise coupling between two contacts in a heavily doped substrate for frequenciesless than 2 GHz. The empirical model is scalable with contact size and spacingsbetween the contacts and model parameters can be readily extracted from simu-lated or measured data. The...
    Resource Type:
    Masters Thesis
    Full Text:
    thanks to Patrick, Brian and Sirisha for helping me to get started in this work. I thank Mr. Sean Wang

  • Noise and Blocker Cancellation Techniques for Power and Area Efficient Wireless Receivers

    Creator:
    Pourbagheri, Saeed
    Abstract:
    The design of mobile wireless devices has always focused on reducing power, area, and cost. This dissertation proposes two techniques that are leveraged to save power and area and therefore cost. The first techniques reduces the noise in the receiver and results in a relaxed power requirement. The second technique...
    Resource Type:
    Dissertation
    Full Text:
    . Patrick Chiang for introducing me to their industry connections and helping me to launch my career with

  • A comparison of substrate noise coupling in heavily doped and lightly doped substrates for mixed-signal circuits

    Creator:
    Ayers, James S.
    Abstract:
    An analysis of substrate noise coupling in mixed-signal circuits has been performed in the TSMC 0.25 [mu]m lightly doped and heavily doped CMOS processes. Methods to minimize noise coupling in both the chip design and board design phases are presented along with techniques for accurate circuit simulation of noise coupling....
    Resource Type:
    Masters Thesis
    Full Text:
    design process, Patrick Birrer and José Silva for their support in using cadence and other CAD tools