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Filtering by: Advisor Mayaram, Kartikeya Degree Field Electrical and Computer Engineering File Format application/pdf Language English [eng]

A substrate noise coupling model for lightly doped CMOS processes

A test fixture and deembedding procedure for high-frequency substrate characterization

Design techniques for radiation hardened-phase locked loops

An efficient and accurate method of estimating substrate noise coupling in heavily dop...

Oscillators and phase locked loops for space radiation environments

A stochastic time-to-digital converter for digital phase-locked loops

Comparison of time-domain and frequency-domain phase noise analyses

Ground tap placement and sizing to minimize substrate noise coupling in RF LNAs

Computationally efficient substrate noise coupling estimation in lightly doped silicon...

Digital phase-locked loops for multi-GHz clock generation