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Filtering by: Creator Ehrlicher, Sarah E. Remove constraint Creator: Ehrlicher, Sarah E. Advisor Mayaram, Kartikeya Remove constraint Advisor: Mayaram, Kartikeya Degree Name Master of Science (M.S.) Remove constraint Degree Name: Master of Science (M.S.)

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  • A nano-power wake-up circuit for RF energy harvesting wireless sensor networks

    Creator:
    Lindsley, Christopher J.
    Abstract:
    A fully integrated CMOS latched comparator is presented for use as a wake-up circuit that is attached to an RF energy harvester in a battery free wireless sensor network. The system consumes less than 36nA static current at 20°C and dissipates 2pJ of energy per conversion. The comparator comprises of...
    Resource Type:
    Masters Thesis
    Full Text:
    thank my fiancée, Sarah René Jean, who has been there for me every day as I have worked to complete my

  • Layout dependent and bias independent scalable substrate model for RF MOSFETs

    Creator:
    Suravarapu, Ravikanth
    Abstract:
    The dependence of the substrate resistance, R[subscript sub], for MOS transistor RF modeling on transistor biasing and layout is studied from device simulations and measurements. Though R[subscript sub] is found to be bias dependent, the error incurred by assuming a constant value equal to the DC resistance is not significant....
    Resource Type:
    Masters Thesis
    Full Text:
    also thank Ferne Simendinger, Sarah O'Leary and other staff of the Electrical and Computer Engineering

  • Contributions to substrate noise due to supply coupling and pin parasitics

    Creator:
    Adluri, Sirisha
    Abstract:
    This thesis presents the contributions to substrate noise due to supply coupling and the effect of pin parasitics on the substrate noise generated by digital circuits. Various sources of substrate noise and their effect on analog circuits sharing the same substrate are discussed. A simulation approach to isolate the various...
    Resource Type:
    Masters Thesis
    Full Text:
    opportunity to thank Ferne Simendinger, Sarah O'Leary, Brian Lindsley and all the office staff for all the

  • Analysis and design of CMOS RF LNAs with ESD protection

    Creator:
    Chandrasekhar, Vinay
    Abstract:
    An analysis that accounts for the effect of standard electrostatic discharge (ESD) structures on critical LNA specifications of noise figure, input matching and gain is presented. It is shown that the ESD structures degrade LNA performance particularly for higher frequency applications. Two LNAs, one with ESD protection and one without,...
    Resource Type:
    Masters Thesis
    Full Text:
    Simendinger, April Melton and Sarah 0 Leary for helping me with all the administrative work. I would like to

  • Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates

    Creator:
    Sharma, Ajit
    Abstract:
    This thesis presents an automated methodology to calibrate the substrate profile for accurate prediction of substrate parasitics using Green's function based extractors. The technique requires fabrication of only a few test structures and results in an accurate three layered approximation of a heavily doped epitaxial silicon substrate. The obtained substrate...
    Resource Type:
    Masters Thesis
    Full Text:
    Ferne Simendinger, April Melton and Sarah O'Leary for all their help and co-operation during my

  • Silencer! : a tool for substrate noise coupling analysis

    Creator:
    Birrer, Patrick
    Abstract:
    This thesis presents Silencer!, a fully automated, schematic-driven tool for substrate noise coupling simulation and analysis. It has been integrated in the CADENCE DFII environment and seamlessly enables substrate coupling analysis in a standard mixed-signal design flow. Silencer! aids IC designers in the analysis of substrate noise coupling at different...
    Resource Type:
    Masters Thesis
    Full Text:
    Simendinger, April Melton, Sarah O’Leary, and all the office staff for all the help provided during my