Index Catalog // ScholarsArchive@OSU

Design techniques for low-voltage and low-power analog-to-digital converters

Creator:: Ahn, Gil Cho
Abstract:: With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
Resource Type:: Dissertation

Noise optimization for low-voltage CMOS audio preamplifier systems

Creator:: Brown, Matthew Eugene
Abstract:: There is a large and growing market for portable consumer audio products with very small size. As the size of these products is reduced, the area occupied by batteries becomes significant and hence limits the number of batteries to one. In order to build such small products, high levels of...
Resource Type:: Masters Thesis

Low-power design techniques for low-voltage analog-to-digital converters

Creator:: Kim, Min Gyu
Abstract:: The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
Resource Type:: Dissertation

Low noise clocking for high speed serial links

Creator:: Brownlee, Merrick
Abstract:: As the functionality of digital chips continues to increase dramatically, chip- to-chip communication bandwidths must scale accordingly to avoid constraining the overall system performance. Therefore, high speed transceiver design has be- come an important research topic. In particular, the performance of the circuits that are responsible for timing accuracy are...
Resource Type:: Dissertation

Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

Creator:: Sharma, Vivek
Abstract:: This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
Resource Type:: Masters Thesis

A multi-bit hybrid DSM over full-scale range without feedback DEM

Creator:: Kwon, Sunwoo, 1974-
Abstract:: Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) speciﬁcations. Among various ADCs, a ∆Σ ADC is best known as a power-eﬃcient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
Resource Type:: Dissertation

High-speed CMOS dual-modulus presalers for frequency synthesis

Creator:: Desikachari, Ranganathan
Abstract:: Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
Resource Type:: Masters Thesis

Low power design techniques for analog-to-digital converters in submicron CMOS

Creator:: Musah, Tawfiq
Abstract:: Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially...
Resource Type:: Dissertation

High-performance delta-sigma analog-to-digital converters

Creator:: da Silva, Jose Barreiro
Abstract:: Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
Resource Type:: Dissertation

A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

Creator:: Wang, Xuesheng
Abstract:: This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
Resource Type:: Dissertation

Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

Creator:: Guerber, Jon
Abstract:: In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
Resource Type:: Dissertation

Data driven optimization in SAR ADC

Creator:: Leung, Jerry
Abstract:: Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques have been adopted to process signals with low activity periods, such as biomedical and industrial sensors. Prior work used least- significant bit first quantization (LSBFQ)...
Resource Type:: Masters Thesis

Automated verilog-to-layout synthesis of ADCs using custom analog cells

Creator:: Waters, Allen
Abstract:: A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize...
Resource Type:: Dissertation

ScholarsArchive@OSU

Design techniques for low-voltage and low-power analog-to-digital converters

Noise optimization for low-voltage CMOS audio preamplifier systems

Low-power design techniques for low-voltage analog-to-digital converters

Low noise clocking for high speed serial links

Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

A multi-bit hybrid DSM over full-scale range without feedback DEM

High-speed CMOS dual-modulus presalers for frequency synthesis

Low power design techniques for analog-to-digital converters in submicron CMOS

High-performance delta-sigma analog-to-digital converters

A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

Data driven optimization in SAR ADC

Automated verilog-to-layout synthesis of ADCs using custom analog cells

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