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  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    Engineering and Computer Science Dean of the Graduate School I understand that my dissertation will become

  • Low-power design techniques for low-voltage analog-to-digital converters

    Creator:
    Kim, Min Gyu
    Abstract:
    The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
    Resource Type:
    Dissertation
    Full Text:
    Engineering Director of the School of Electrical Engineering and Computer Science Dean of the Graduate

  • Low power design techniques for analog-to-digital converters in submicron CMOS

    Creator:
    Musah, Tawfiq
    Abstract:
    Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially...
    Resource Type:
    Dissertation
    Full Text:
    Engineering and Computer Science Dean of the Graduate School I understand that my dissertation will become

  • High-speed CMOS dual-modulus presalers for frequency synthesis

    Creator:
    Desikachari, Ranganathan
    Abstract:
    Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
    Resource Type:
    Masters Thesis
    Full Text:
    the degree of Master of Science in Electrical and Computer Engineering presented on October 1, 2003

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    oL.lectrica1 Engineering and Computer Science Dean of Gr I understand that my thesis will become part of the

  • A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

    Creator:
    Wang, Xuesheng
    Abstract:
    This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
    Resource Type:
    Dissertation
    Full Text:
    Computer Engineering Director of School of Electricdl Engineering and Computer Sciences Dean of the I

  • Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

    Creator:
    Guerber, Jon
    Abstract:
    In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
    Resource Type:
    Dissertation
    Full Text:
    ________________________________________________________________________ Director of the School of Electrical Engineering and Computer Science

  • Automated verilog-to-layout synthesis of ADCs using custom analog cells

    Creator:
    Waters, Allen
    Abstract:
    A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize...
    Resource Type:
    Dissertation
    Full Text:
    coursework. Many thanks to Dr. Karen Shell from the College of Earth, Ocean, and Atmospheric Sciences for

  • Data driven optimization in SAR ADC

    Creator:
    Leung, Jerry
    Abstract:
    Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques have been adopted to process signals with low activity periods, such as biomedical and industrial sensors. Prior work used least- significant bit first quantization (LSBFQ)...
    Resource Type:
    Masters Thesis
    Full Text:
    THESIS OF Jerry Leung for the degree of Master of Science in Electrical and Computer Engineering