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Advisor
Moon, Un Ku
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Date
2006
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Digital phase-locked loops for multi-GHz clock generation
Design techniques for clocking high performance signaling systems
Low noise clocking for high speed serial links
A multi-bit delta sigma audio digital-to-analog converter
Characterization of a digital phase locked loop and a stochastic time to digital conve...
Low-power design techniques for low-voltage analog-to-digital converters
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Academic Affiliation
Electrical Engineering and Computer Science
6
Advisor
Moon, Un Ku
[remove]
6
Hanumolu, Pavan Kumar
1
Mayaram, Kartikeya
1
Temes, Gabor C.
1
Commencement Year
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Current results range from
2006
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2007
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Committee Member
Temes, Gabor
3
Liu, Huaping
2
Mayaram, Kartikeya
2
Coakley, Jim Jr.
1
Hanumolu, Pavan Kumar
1
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Committee Members
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Creator
Brownlee, Merrick
1
Geissenhainer, Erik D.
1
Hanumolu, Pavan Kumar
1
Kim, Min Gyu
1
Kratyuk, Volodymyr
1
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Date
2006
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6
Decade
2000-2009
6
Degree Field
Electrical and Computer Engineering
6
Degree Level
Doctoral
5
Master's
1
Degree Name
Doctor of Philosophy (Ph.D.)
5
Master of Science (M.S.)
1
File Format
application/pdf
6
Language
English [eng]
6
License
All rights reserved
5
Non-Academic Affiliation
Oregon State University. Graduate School
6
Peer Reviewed
No
4
Resource Type
Dissertation
5
Masters Thesis
1
Rights Statement
In Copyright
5
Copyright Not Evaluated
1
Subject
Phase-locked loops
2
Analog-to-digital converters -- Design and construction
1
Digital electronics
1
Digital integrated circuits -- Design and construction
1
Digital integrated circuits -- Design and construction -- Evaluation
1
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