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Filtering by: Creator Johnson, K. S. Remove constraint Creator: Johnson, K. S. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku License All rights reserved Remove constraint License: All rights reserved

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  • A 1V 40mA Fast Transient Capless LDO with 7uA Quiescent Current in 180nm CMOS using Ring Amplifier with Adaptive Damping

    Creator:
    Xiao, Bohui
    Abstract:
    Ring amplification has emerged as an efficient technique to drive large capacitive loads in switched capacitor circuits. We propose circuit techniques to demonstrate the first application of a ring amplifier in a non-capacitive feedback system of a LDO. These techniques enable a simple cap-less LDO structure in 180nm CMOS that...
    Resource Type:
    Masters Thesis
    Full Text:
    , S. Weaver, K. Sobue, S. Takeuchi, K. Hamashita and U. Moon, “Ring amplifiers for switched

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    -domain when zk = 1 1 z−zk ro s−sk × 1 z1−αk −z1−βk ro s r0 = sk r0 = 1β−α 1 (z−zk)2 r1s+r0 (s−sk)2

  • Power-efficient two-step pipelined analog-to-digital conversion

    Creator:
    Lee, Ho-Young
    Abstract:
    Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which...
    Resource Type:
    Dissertation
    Full Text:
    met the other unforgettable Moon in my early 30’s. Thanks to the inspiration, my 30’s have been

  • Low voltage techniques for pipelined analog-to-digital converters

    Creator:
    Carnes, Joshua Kenneth
    Abstract:
    To realize pipelined ADCs in deep-submicron processes, low voltage techniques must be developed to work around problems created by limited supply voltages such as the floating switch dead zone, reduced SNR, and reduced OpAmp performance. This thesis analyzes standard and low voltage design issues for pipelined ADCs and proposes a...
    Resource Type:
    Masters Thesis
    Full Text:
    range and saves power by removing the dedicated, front-end S/H. Prototype performance demonstrates

  • Ring Amplifier Optimized for High Resolution Analog-to-Digital Converter Applications

    Creator:
    ElShater, Ahmed O.
    Abstract:
    In recent years, SAR ADCs have been shown to acheive faster conversion times and improved power efficiencies due to their simple building blocks that are digital in nature and scale favorably with technology. High resolution ADCs with stringent noise requirement has led to the adoption of hybrid ADC architectures such...
    Resource Type:
    Dissertation
    Full Text:
    implemented in 0.18µm technology achieves a DR of 95dB and a Schreier FOM better than 180dB at both 2MS/s and

  • High-performance Ring Amplifier based Analog-to-Digital Converters

    Creator:
    Hu, Hang
    Abstract:
    Ring Amplifier serves as a great candidate both for precision amplification and fast integration in the discrete time system. It can be utilized in high-performance analog-to-digital converters (ADCs). In high-speed ADC utilizing pipelined architectures with residue amplification, Successive-Approximation Register (SAR) ADCs as the sub-ADC and power efficient Ring Amplifier based...
    Resource Type:
    Dissertation
    Full Text:
    -channel GS/s 12-bit passive-assisted high- speed pipelined-SAR ADC with the low-power three-stage

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    delta-sigma ADC, a 0.9 V, 10-bit, 20MS/s CMOS pipelined ADC and a 2.4 V, 12-bit, 10MS/s CMOS pipelined

  • Low-power design techniques for low-voltage analog-to-digital converters

    Creator:
    Kim, Min Gyu
    Abstract:
    The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
    Resource Type:
    Dissertation
    Full Text:
    -loop. A 0.9V 92dB delta-sigma audio ADC and a 10MS/s 11-b algorithmic ADC were implemented to

  • A Wide Modulation Range and PVT-Tolerant Spread-Spectrum Modulation Clock Generator

    Creator:
    Sun, Hyuk
    Abstract:
    This dissertation presents a phase domain in-loop-bandwidth spread-spectrum clock generation technique. In this proposed technique, a charge-based discrete-time loop filter is proposed to enable the phase domain in-loop-bandwidth spread-spectrum modulation without a delta-sigma modulator or time-to-digital converter. The in-loop-bandwidth modulation technique maximizes the loop bandwidth to improve phase noise suppression...
    Resource Type:
    Dissertation
    Full Text:
    resumed her studies for the GED and college in her middle of 50’s. As a mom and student, she is always

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
    Full Text:
    at 20 MS/s. Built in 1P4M 0.18 µm technology and operating at 1.3 V sup- ply, the ADC consumes 5.9