Graduate Thesis Or Dissertation
 

High-performance Ring Amplifier based Analog-to-Digital Converters

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/s1784v155

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  • Ring Amplifier serves as a great candidate both for precision amplification and fast integration in the discrete time system. It can be utilized in high-performance analog-to-digital converters (ADCs). In high-speed ADC utilizing pipelined architectures with residue amplification, Successive-Approximation Register (SAR) ADCs as the sub-ADC and power efficient Ring Amplifier based residue amplifiers greatly reduce the whole ADC power dissipation. The single-channel GS/s 12-bit passive-assisted high-speed pipelined-SAR ADC with the low-power three-stage structure is proposed. Ring Amplifier based pipelined-SAR ADC implemented in 22nm FinFET process is used to demonstrate the performance capabilities. In the second part of this research, a proposed architecture of multi-stage noise-shaping (MASH) structure with noise shaping successive-approximation (NSSAR) ADC is presented. The proposed intrinsic stable 4th order MASH NSSAR ADC can not only take advantage of sharp noise shaping effect but also gain great benefits from hardware reuse. With ultra-low oversampling ratio (OSR), the MASH NSSAR ADC is realized in 22nm FinFET process with 0.9V supply. The noise leakage introduced by the analog and digital filter mismatch is analyzed and indicates no calibration requirement in the proposed MASH under reasonable mismatch range. A process, voltage, temperature (PVT) stable Ring Amplifier that achieves high-speed settling both in precision amplification and fast integration is also demonstrated in this design. With 300MS/s sampling frequency, 60MHz bandwidth (OSR=2.5) and 25MHz (OSR=6), the topology achieves 78dB and 85dB SNDR respectively.
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  • Pending Publication
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  • 2022-12-09 to 2024-01-11

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