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Filtering by: Creator Phillips, A. Jason Remove constraint Creator: Phillips, A. Jason Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Next generation analog-to-digital conversion using time-based encoding and digital synthesis techniques

    Creator:
    Muhlestein, Jason, Russell
    Abstract:
    The internet-of-things is a growing market segment which is based on an arrayof portable communication devices with high power efficiency. Advanced semiconductortechnology can easily improve their digital performance, but the samecannot be said for the analog blocks which are vital to their operation. Highperformance analog circuits continue to use conventional...
    Resource Type:
    Dissertation
    Full Text:
    Techniques by Jason Russell Muhlestein A DISSERTATION submitted to Oregon State University in partial

  • A Wide Modulation Range and PVT-Tolerant Spread-Spectrum Modulation Clock Generator

    Creator:
    Sun, Hyuk
    Abstract:
    This dissertation presents a phase domain in-loop-bandwidth spread-spectrum clock generation technique. In this proposed technique, a charge-based discrete-time loop filter is proposed to enable the phase domain in-loop-bandwidth spread-spectrum modulation without a delta-sigma modulator or time-to-digital converter. The in-loop-bandwidth modulation technique maximizes the loop bandwidth to improve phase noise suppression...
    Resource Type:
    Dissertation
    Full Text:
    Engineering Ph.D student. Jason shows me how to survive as a delightful engineering Ph.D student, who never

  • A 1V 40mA Fast Transient Capless LDO with 7uA Quiescent Current in 180nm CMOS using Ring Amplifier with Adaptive Damping

    Creator:
    Xiao, Bohui
    Abstract:
    Ring amplification has emerged as an efficient technique to drive large capacitive loads in switched capacitor circuits. We propose circuit techniques to demonstrate the first application of a ring amplifier in a non-capacitive feedback system of a LDO. These techniques enable a simple cap-less LDO structure in 180nm CMOS that...
    Resource Type:
    Masters Thesis
    Full Text:
    , 2018. Title: A 1V 40mA Fast Transient Capless LDO with 7uA Quiescent Current in 180nm CMOS

  • Power-Efficient Design Techniques and Architectures for Scalable Submicron Analog Circuits

    Creator:
    Xu, Yang
    Abstract:
    As the CMOS process scales down to submicron, digital circuit performance improves, while reduced supply voltage and lower transistor intrinsic gain make it difficult to implement analog circuits in a power efficient manner. Therefore, it has become advantageous to shift more analog signal processing functions conventionally realized in voltage (analog)...
    Resource Type:
    Dissertation
    Full Text:
    circuits in a power efficient manner. Therefore, it has become advantageous to shift more analog signal

  • Power efficient analog-to-digital converters using both voltage and time domain information

    Creator:
    Oh, Taehwan
    Abstract:
    As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs is strongly increased. Recently, time-domain quantization has drawn attention from its scalability in deep submicron CMOS processes. Furthermore, there are several interesting aspects of time-domain...
    Resource Type:
    Dissertation
    Full Text:
    research focuses on developing a new architecture for power efficient, high resolution ADCs using both

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
    Full Text:
    approved: Un-Ku Moon Data converters are ubiquitous building blocks of a signal chain. The rapid increase

  • High-speed switched-capacitor filters based on unity-gain buffers

    Creator:
    Bruneau, David
    Abstract:
    In this work a new voltage buffer, the drain-follower, achieves 300MHz band-width with 2pF load, a dc gain of 0.993V/V, 1mV offset voltage, -60 dB total harmonic distortion at 1.4Vpp output voltage and 6.5mW power dissipation from 5V supply. A unity-gain buffer switched-capacitor biquad filter has been implemented in 0.5μm...
    Resource Type:
    Masters Thesis
    Full Text:
    Switched-Capacitor Filters Based on Unity-Gain Buffers Abstract approved: Un-Ku Moon In this work a new

  • Design techniques for time based data converters

    Creator:
    Gande, Manideep
    Abstract:
    Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data converters which use time based processing. Another artifact of geometry scaling is the increase in complexity of digital circuitry available on traditional analog ICs, as...
    Resource Type:
    Dissertation
    Full Text:
    primarily divided into two parts. The first part focuses on a technique to convert the time information

  • High-speed CMOS dual-modulus presalers for frequency synthesis

    Creator:
    Desikachari, Ranganathan
    Abstract:
    Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
    Resource Type:
    Masters Thesis
    Full Text:
    dual-modulus prescaler is one of the key components of a PLL-based frequency synthesizer, operating at

  • Ring Amplifier Optimized for High Resolution Analog-to-Digital Converter Applications

    Creator:
    ElShater, Ahmed O.
    Abstract:
    In recent years, SAR ADCs have been shown to acheive faster conversion times and improved power efficiencies due to their simple building blocks that are digital in nature and scale favorably with technology. High resolution ADCs with stringent noise requirement has led to the adoption of hybrid ADC architectures such...
    Resource Type:
    Dissertation
    Full Text:
    ADC, combine the concepts of SAR and Pipeline ADC architecture where a residue amplifier provides a

  • Efficient use of time information in analog-to-digital converters

    Creator:
    Hu, Yue
    Abstract:
    Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information being carried by binary voltage, time-domain operation is much less sensitive to voltage noise compared to conventional voltage domain operation. However, for analog-to-digital converter (ADC)...
    Resource Type:
    Dissertation
    Full Text:
    maintaining/improving the overall data conversion accuracy and power efficiency. This dissertation has a

  • Ring Amplifier Design Techniques for High-Precision and High-Speed Amplification

    Creator:
    Leuenberger, Spencer
    Abstract:
    Demands of today's integrated society dependent on communication systems have driven the creation of ever more efficient analog-to-digital converters. For the same reasons, digital circuitry has rapidly expanded to serve all the different systems and needs of consumers. The trend of technology development has been to make these digital circuits...
    Resource Type:
    Dissertation
    Full Text:
    a degradation of key analog parameters which make the ubiquitous operation amplifier less efficient

  • Design of low OSR, high precision analog-to-digital converters

    Creator:
    Rajaee, Omid
    Abstract:
    Advances in electronic systems have lead to the demand for high resolution, high bandwidth Analog-to-Digital Converters (ADCs). Oversampled ADCs are well- known for high accuracy applications since they benefit from noise shaping and they usually do not need highly accurate components. However, as a consequence of oversampling, they have limited...
    Resource Type:
    Dissertation
    Full Text:
    . However, as a consequence of oversampling, they have limited signal bandwidth. The signal bandwidth (BW

  • Single-Ended Techniques for Delta-Sigma Modulators

    Creator:
    Lee, Calvin Y.
    Abstract:
    This work presents a high-resolution Delta-Sigma ADC which combines the use of the pseudo-pseudo-differential noise filtering technique with single-ended ring amplifier based integrators. The pseudo-pseudo-differential noise filtering technique utilizes single-ended circuits while maintaining the even-order rejection found in fully-differential structures which alleviates, in the active analog blocks, the need for...
    Resource Type:
    Dissertation
    Full Text:
    : Single-Ended Techniques for Delta-Sigma Modulators Abstract approved: Un-Ku Moon This work presents a

  • Data driven optimization in SAR ADC

    Creator:
    Leung, Jerry
    Abstract:
    Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques have been adopted to process signals with low activity periods, such as biomedical and industrial sensors. Prior work used least- significant bit first quantization (LSBFQ)...
    Resource Type:
    Masters Thesis
    Full Text:
    by Jerry Leung A THESIS submitted to Oregon State University in partial fulfillment of

  • Automated verilog-to-layout synthesis of ADCs using custom analog cells

    Creator:
    Waters, Allen
    Abstract:
    A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize...
    Resource Type:
    Dissertation
    Full Text:
    : Automated Verilog-to-Layout Synthesis of ADCs Using Custom Analog Cells. Abstract approved: Un-Ku Moon A