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  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    never have materialised. I also want to thank Prof. Huaping Liu, Roger Traylor and Prof. William M

  • Power-Efficient Design Techniques and Architectures for Scalable Submicron Analog Circuits

    Creator:
    Xu, Yang
    Abstract:
    As the CMOS process scales down to submicron, digital circuit performance improves, while reduced supply voltage and lower transistor intrinsic gain make it difficult to implement analog circuits in a power efficient manner. Therefore, it has become advantageous to shift more analog signal processing functions conventionally realized in voltage (analog)...
    Resource Type:
    Dissertation
    Full Text:
    0.18μm CMOS, and occupies a core area of 0.12mm2. Operating with a 1.3V supply voltage, the filter

  • Area efficient D/A converters for accurate DC operation

    Creator:
    Greenley, Brandon Royce
    Abstract:
    The design of mixed-signal integrated circuits has evolved from simple analog and digital circuits operating on the same silicon substrate to the point that now we have complete system on a chip solutions for communication systems. The levels of integration needed to remain cost effective in today's integrated circuit (IC)...
    Resource Type:
    Masters Thesis
    Full Text:
    (110 m x 94 pm), and only consumes 2.8 mW of power. In addition to the 10-bit DAC, a design is

  • Design of high efficiency step-down switched capacitor DC/DC converter

    Creator:
    Ma, Mengzhe
    Abstract:
    Recently, switched capacitor DC/DC converters are extensively used in portable electronic devices because they feature many advantages, such as high efficiency, small package, low quiescent current, minimal external components and low cost. In this thesis, two step-down switched capacitor DC/DC converters are designed. One has the fixed output options 1.5V,...
    Resource Type:
    Masters Thesis
    Full Text:
    Configurations Vi n Vo u common Vo ut Cl gain=1/2 Vi n Vo ut gain= 1 Cl Vout C2± g a n = 2/3 Figure

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    peaking 15 (a) (b) 10 -2 10 -1 10 0 10 1 10 2 -80 -60 -40 -20 0 20 Frequency (Hz) M a g

  • High-speed switched-capacitor filters based on unity-gain buffers

    Creator:
    Bruneau, David
    Abstract:
    In this work a new voltage buffer, the drain-follower, achieves 300MHz band-width with 2pF load, a dc gain of 0.993V/V, 1mV offset voltage, -60 dB total harmonic distortion at 1.4Vpp output voltage and 6.5mW power dissipation from 5V supply. A unity-gain buffer switched-capacitor biquad filter has been implemented in 0.5μm...
    Resource Type:
    Masters Thesis
    Full Text:
    current of M6 which is mirrored to M by M5 and increases the bias current of the PMOS SF. In the PMOS SF

  • OP-AMP free SC biquad LPF and delta-sigma ADC

    Creator:
    Yoo, Kiseok
    Abstract:
    The objective of this work is to explore the feasibility of replacing conventional op-amps with inverters in switched-capacitor (SC) circuits. In order to verify the idea, a low-pass filter (LPF) and a second-order delta-sigma (∆Σ) analog-todigital converter (ADC) are designed in the 0.5-m CMOS technology. The low-pass filter structure is...
    Resource Type:
    Masters Thesis
    Full Text:
    represented by the following equation. 18 eGxy += , (4.1) where G is the slope of the straight line

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis

  • 20-stage pipelined ADC with radix-based calibration

    Creator:
    Yun, Chong Kyu
    Abstract:
    A radix-based calibration technique was previously proposed with a two-stage algorithmic analog-to-digital converter (ADC). The objective of this work is to verify the capability of radix-based calibration for a true multi-stage ADC. In order to prove the idea, a single bit-per-stage, 20-stage pipelined ADC is designed in a 0.35-μm CMOS...
    Resource Type:
    Masters Thesis
    Full Text:
    chapter. Figure 3.1 shows implementation of the technique. V9 V10 STG 10 STG 11 STG 12-17 D9 , G<2 D10 G

  • Design techniques for radiation hardened-phase locked loops

    Creator:
    Nemmani, Anantha Nag
    Abstract:
    Spacecrafts experience radiation in the course of their operation and all electronic equipment on board these spacecrafts has to be designed to withstand the effects of this radiation. This thesis describes the effects of total ionization dose (TID) and single event transients (SET) in phase-locked loops - an important circuit...
    Resource Type:
    Masters Thesis
    Full Text:
    energy required is 1.1eV. Similarly, it takes V G V G V G (a) (b) (c) Poly Oxide Bulk FIGURE 2.1

  • A stochastic time-to-digital converter for digital phase-locked loops

    Creator:
    Ok, Kerem
    Abstract:
    Digital phase-locked loops (PLLs) have been receiving increasing attention recently due to their ease of integration, scalability and performance comparable to their analog counterparts. In digital PLLs, increased resolution in time-to-digital conversion is desirable for improved noise performance. This work describes the design and simulation of a stochastic time-to-digital converter...
    Resource Type:
    Masters Thesis
    Full Text:
    2004. [15] M. H. Perrott, T. L. Tewksbury III, and C. G. Sodini, “A 27-mW CMOS fractional-N

  • Power efficient analog-to-digital converters using both voltage and time domain information

    Creator:
    Oh, Taehwan
    Abstract:
    As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs is strongly increased. Recently, time-domain quantization has drawn attention from its scalability in deep submicron CMOS processes. Furthermore, there are several interesting aspects of time-domain...
    Resource Type:
    Dissertation
    Full Text:
    . The measured results of the prototype ADC implemented in a 0.13μm CMOS demonstrate peak SNDR of

  • Design techniques for low-voltage analog-to-digital converter

    Creator:
    Chang, Dong-Young
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low-voltage conditions. There are several well-known techniques to bypass the problem. These approaches include: (1)...
    Resource Type:
    Dissertation
    Full Text:
    Under i1fl=i0Ul,fT can be obtained as ijgmvg (2.2) g,,, _/JnVdfT (2.3) 2.,rL2 4 Since fr is a

  • Low voltage techniques for pipelined analog-to-digital converters

    Creator:
    Carnes, Joshua Kenneth
    Abstract:
    To realize pipelined ADCs in deep-submicron processes, low voltage techniques must be developed to work around problems created by limited supply voltages such as the floating switch dead zone, reduced SNR, and reduced OpAmp performance. This thesis analyzes standard and low voltage design issues for pipelined ADCs and proposes a...
    Resource Type:
    Masters Thesis
    Full Text:
    , and 49.7 dB SNDR for an 8-bit ENOB in a 0.18 μm CMOS process with a 1 V supply. Little change in

  • Design of high-performance pipeline analog-to-digital converters in low-voltage processes

    Creator:
    Myers, Charles Grant
    Abstract:
    Pipeline analog-to-digital converters (ADCs) have long been used in high-speed systems for power-efficient data conversion. Broadband communication and video processing systems are placing high demands on converter accuracy and speed (above 14 bits and in the multiple-MHz range). The increasing converter requirements coupled with lower supply voltages in modern processes...
    Resource Type:
    Masters Thesis
    Full Text:
    STAGE 3 STAGE 4 M(n−1)+1M= # of stages including B.E. Vin S/H STAGE 1 B.E. A/D Vref DIGITAL

  • Fast opamp-free delta sigma modulator

    Creator:
    Thomas, Daniel E.
    Abstract:
    Switched-capacitor (SC) circuits are commonly used for analog signal processing because they can be used to realize precision filters and data converters on an integrated circuit (IC). However, for high speed applications SC circuit operating speeds are limited by the internally-compensated opamps found in SC integrators, a common building block...
    Resource Type:
    Masters Thesis
    Full Text:
    /L)M2 (tm/jim) 1749/0.18 (W/L)M3 (/2m/m) 915/0.18 (W/L)M4 (m/im) 915/0.18 (C95)M4 measured 0.922pF

  • A fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs

    Creator:
    Wang, Xuesheng
    Abstract:
    This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
    Resource Type:
    Dissertation
    Full Text:
    of structure, which is shown in Figure 3-1. A DAC with M+1 output levels consists of M unit elements

  • A continuous time frequency translating delta Sigma Modulator

    Creator:
    Pulincherry, Anurag
    Abstract:
    This thesis presents a continuous time bandpass delta sigma modulator with frequency translation inside the delta sigma loop. The input IF signal is down converted to baseband after amplification by a low Q, wideband bandpass resonator. The down converted IF signal is digitized by a continuous time, second order lowpass...
    Resource Type:
    Masters Thesis
    Full Text:
    Naviasky, and Mr Michael M Hufford of Tality, Cadence, for supporting this project and giving valuable

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation

  • Ring Amplifier Optimized for High Resolution Analog-to-Digital Converter Applications

    Creator:
    ElShater, Ahmed O.
    Abstract:
    In recent years, SAR ADCs have been shown to acheive faster conversion times and improved power efficiencies due to their simple building blocks that are digital in nature and scale favorably with technology. High resolution ADCs with stringent noise requirement has led to the adoption of hybrid ADC architectures such...
    Resource Type:
    Dissertation
    Full Text:
    . SAR1 resolves M bits following the input sampling phase. Then the RA amplifies the residue with a gain

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
    Full Text:
    this setup, ”m” is the LMS fit parameter. The parameter m can be evaluated from Eq. 2.2 as given by Eq

  • Design of low OSR, high precision analog-to-digital converters

    Creator:
    Rajaee, Omid
    Abstract:
    Advances in electronic systems have lead to the demand for high resolution, high bandwidth Analog-to-Digital Converters (ADCs). Oversampled ADCs are well- known for high accuracy applications since they benefit from noise shaping and they usually do not need highly accurate components. However, as a consequence of oversampling, they have limited...
    Resource Type:
    Dissertation
    Full Text:
    by reducing the inter-stage gain (G). Reducing G extends the redundancy between the two stages and

  • Accuracy enhancement techniques in low-voltage high-speed pipelined ADC design

    Creator:
    Li, Jipeng
    Abstract:
    Pipelined analog to digital converters (ADCs) are very important building blocks in many electronic systems such as high quality video systems, high performance digital communication systems and high speed data acquisition systems. The rapid development of these applications is driving the design of pipeline ADCs towards higher speed, higher dynamic...
    Resource Type:
    Dissertation
    Full Text:
    OUTPUT 1b In-b Inb ANALOG..H SAM PUNG STAGE 1 ] STAGEj_ .... H STAGE m Fig.2. 1 A typical pipelined

  • A multi-bit delta sigma audio digital-to-analog converter

    Creator:
    Wang, Ruopeng
    Abstract:
    Digital-to-analog converters (DACs) with wide dynamic range and high linearity are required for high-end audio applications. A multi-bit delta sigma audio DAC, using a novel gain-correction technique, is described in this thesis. For widely varying on-chip RC time constant, the DAC gain can be accurately controlled by the correction circuitry....
    Resource Type:
    Dissertation
    Full Text:
    ............................................................................ 34 4-4 Output spectrum with SDWA (M=104

  • Power-efficient two-step pipelined analog-to-digital conversion

    Creator:
    Lee, Ho-Young
    Abstract:
    Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which...
    Resource Type:
    Dissertation
    Full Text:
    made in the past 5 years using sub-micron technologies less than 0.13 m. A pipelined ADC is the

  • Automated analysis, design, and optimization of low noise oscillators

    Creator:
    Vytyaz, Igor
    Abstract:
    Low noise oscillators are universally needed in digital systems for clock generation and synchronization, and in radio-frequency communication front-ends for frequency up- and down-conversion. Noise in oscillators results in timing jitter, and limits the clock frequency of digital systems. In radio-frequency communication systems, phase noise in oscillators lowers the signal-to-noise...
    Resource Type:
    Dissertation
    Full Text:
    ∣ ∣ ∣ ∣ xs(t) , C : R → Rm×m (2.9) and G(t) ≡ G ( xs(t) ) = df(x) dx ∣ ∣ ∣ ∣ xs(t) , G : R → Rm×m

  • Single-Ended Techniques for Delta-Sigma Modulators

    Creator:
    Lee, Calvin Y.
    Abstract:
    This work presents a high-resolution Delta-Sigma ADC which combines the use of the pseudo-pseudo-differential noise filtering technique with single-ended ring amplifier based integrators. The pseudo-pseudo-differential noise filtering technique utilizes single-ended circuits while maintaining the even-order rejection found in fully-differential structures which alleviates, in the active analog blocks, the need for...
    Resource Type:
    Dissertation
    Full Text:
    CF CS VG VOUT MPO MNO V1 V2VIN log10(ω) M a g n it u d e ( d B ) 0 ωu ωp1,2ωpout a

  • Oscillators and phase locked loops for space radiation environments

    Creator:
    Vandepas, Martin
    Abstract:
    Circuits operating outside the earth’s atmosphere are more vulnerable to cosmic radiation and require special design consideration. The purpose of this work is to explore methods of mitigating the effect of radiation in phase locked loop (PLL) circuits. Several voltage controlled oscillators (VCOs) and two complete PLLs are designed and...
    Resource Type:
    Masters Thesis
    Full Text:
    environments,” IEEE Trans. Nucl. Sci., vol. 50, pp. 466-482, Jun. 2003. [10] G. M. Anelli, “Conception et

  • Design techniques for PVT tolerant phase-locked loops

    Creator:
    Wu, Ting
    Abstract:
    The continued scaling of deep-submicron CMOS technology enables low-voltage high-frequency phase-locked loops (PLLs) to be fully integrated in complex mixed-signal systems. However, fluctuations due to the manufacturing process and variations in environmental conditions, such as supply voltage and temperature, are also significantly increased. As a result, the performance of PLLs...
    Resource Type:
    Dissertation
    Full Text:
    Year 1.0 10 100 2006 2009 2012 2015 2018 Year G at e le n g th ( n m ) L o ca l C lo ck

  • Low power design techniques for analog-to-digital converters in submicron CMOS

    Creator:
    Musah, Tawfiq
    Abstract:
    Advances in process technologies have led to the development of low-power high speed digital signal processing blocks that occupy small areas. These advances are critical in the development of portable electronic devices with small feature size and long battery life. However, the design of analog and mixed-signal building blocks, especially...
    Resource Type:
    Dissertation
    Full Text:
    L en g th [ n m ] Gate Length Figure 1.1: 2009 International Technology Roadmap for

  • Low voltage switched capacitor circuits for lowpass and bandpass [delta sigma] converters

    Creator:
    Keskin, Mustafa
    Abstract:
    The most accurate method for performing analog signal processing in MOS (metal-oxide-semiconductor) integrated circuits is through the use of switched-capacitor circuits. A switched-capacitor circuit operates as a discrete-time signal processor. These circuits have been used in a variety of applications, such as filters, gain stages, voltage-controlled oscillators, and modulators. A...
    Resource Type:
    Dissertation

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    devices. 6 PolyS G D Oxide n+ n+ p-substrate W Leff L tox Figure 2.1: Structure of a NMOS

  • A Wide Modulation Range and PVT-Tolerant Spread-Spectrum Modulation Clock Generator

    Creator:
    Sun, Hyuk
    Abstract:
    This dissertation presents a phase domain in-loop-bandwidth spread-spectrum clock generation technique. In this proposed technique, a charge-based discrete-time loop filter is proposed to enable the phase domain in-loop-bandwidth spread-spectrum modulation without a delta-sigma modulator or time-to-digital converter. The in-loop-bandwidth modulation technique maximizes the loop bandwidth to improve phase noise suppression...
    Resource Type:
    Dissertation
    Full Text:
    of the VCO output (=fOUT/M) to the input frequency (fREF). HLF(s) HP+I(s)HHF(s) = KVCO s

  • Noise optimization for low-voltage CMOS audio preamplifier systems

    Creator:
    Brown, Matthew Eugene
    Abstract:
    There is a large and growing market for portable consumer audio products with very small size. As the size of these products is reduced, the area occupied by batteries becomes significant and hence limits the number of batteries to one. In order to build such small products, high levels of...
    Resource Type:
    Masters Thesis
    Full Text:
    er ( dB ), N or m al iz ed to A F = 1, 2 0 to 2 0k H z FIGURE 4.1. Flicker Noise

  • Duty-cycle controlled switched resistor techniques for continuously tunable, low-voltage circuits

    Creator:
    Kurahashi, Peter
    Abstract:
    A duty-cycle controlled switched resistor is a tunable resistive element that uses pulse width modulation as the method of tuning. This thesis will describe the operation of switched resistors and propose several circuit architectures that are well suited to the use of switched resistors. These architectures include filters, mixers, and...
    Resource Type:
    Dissertation
    Full Text:
    200 300 400 500 0 0.2 0.4 0.6 0.8 1 Time [ns] A m p lit u d e [V ] Continuous (100

  • Time and statistical information utilization in high efficiency sub-micron CMOS successive approximation analog to digital converters

    Creator:
    Guerber, Jon
    Abstract:
    In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
    Resource Type:
    Dissertation
    Full Text:
    ) CRZZ=1, (e) 2b, (f) 1.5b, (g) 1b

  • Design techniques for time based data converters

    Creator:
    Gande, Manideep
    Abstract:
    Modern day CMOS processes are characterized by voltage scaling and geometry scaling. Geometry scaling helps reduce gate delays, thereby aiding in the design of data converters which use time based processing. Another artifact of geometry scaling is the increase in complexity of digital circuitry available on traditional analog ICs, as...
    Resource Type:
    Dissertation
    Full Text:
    are more digital in nature. G ai n 1/T d Technology Node 1µm 45nm Figure 1.3: Trends in CMOS

  • Low-power design techniques for low-voltage analog-to-digital converters

    Creator:
    Kim, Min Gyu
    Abstract:
    The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
    Resource Type:
    Dissertation

  • Architectural compensation techniques for analog inaccuracies in delta-sigma analog-to-digital converters, Architectural compensation techniques for analog inaccuracies in ΔΣanalog-to-digital converters

    Creator:
    Maghari, Nima
    Abstract:
    Delta-sigma analog-to-digital converters (ADCs) are suitable for many applications due to several advantages such as relaxed anti-aliasing filter, high signal-to noise and distortion ratio (SNDR) and most important of all, reduced sensitivity to analog imperfections.This thesis introduces several structures to overcome loop imperfections and stability issues in delta-sigma modulators. First,...
    Resource Type:
    Dissertation
    Full Text:
    ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.7 The linear range of an M-level quantizer (M is odd). . . . . . . . . . . . . . 15 2.8 The

  • Automated synthesis of analog to digital conversion

    Creator:
    Weaver, Skyler
    Abstract:
    This thesis describes circuit architectures and techniques that facilitate the automatic synthesis and fabrication of analog-to-digital converters (ADCs). Since automated synthesis already exists for digital circuits and is part of the digital circuit design flow, this work demonstrates the feasibility of ADC synthesis with little or no modification to presently...
    Resource Type:
    Dissertation

  • High-performance Ring Amplifier based Analog-to-Digital Converters

    Creator:
    Hu, Hang
    Abstract:
    Ring Amplifier serves as a great candidate both for precision amplification and fast integration in the discrete time system. It can be utilized in high-performance analog-to-digital converters (ADCs). In high-speed ADC utilizing pipelined architectures with residue amplification, Successive-Approximation Register (SAR) ADCs as the sub-ADC and power efficient Ring Amplifier based...
    Resource Type:
    Dissertation
    Full Text:
      = (1.1) 2 1 2 3 1 , m eq m A A gKT v out ring C g

  • A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications

    Creator:
    Xiao, Ying
    Abstract:
    A novel switched-R-MOSFET-C input branch is proposed for low-voltage and high-linearity applications. The tunability is achieved by varying the clock duty cycle using an automatic tuning circuit. This tuning method does not involve a change in gate voltage, and is therefore particularly suitable for low-voltage applications. The advantages of the...
    Resource Type:
    Masters Thesis
    Full Text:
    High-Linearity Applications Abstract approved: Gabor Ternes and Un-ku M~on A novel switched-R

  • High-speed CMOS dual-modulus presalers for frequency synthesis

    Creator:
    Desikachari, Ranganathan
    Abstract:
    Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
    Resource Type:
    Masters Thesis
    Full Text:
    - Pass Filter VCO X(t) Y(t) (a) G LPF (s) X(s) Y(s) K PD K vco s (b

  • Design techniques for clocking high performance signaling systems

    Creator:
    Hanumolu, Pavan Kumar
    Abstract:
    Scaling of CMOS technology has progressed relentlessly for the past several decades. In order for this unprecedented scaling to benefit the performance of large digital systems, the communication bandwidth between integrated circuits (ICs) must scale accordingly. However, interconnect technology does not scale as aggressively, making communication between chips the major...
    Resource Type:
    Dissertation
    Full Text:
    also greatly enjoyed the good company and camaraderie of Anurag, David B., Dave G., Emma, Gowtham

  • Investigation of a noise-shaping accelerometer interface circuit for two-chip implementation

    Creator:
    Zechmann, Jacob W.
    Abstract:
    The world market for sensors is several hundred million dollars growing at an annual rate of 20 percent with accelerometers comprising 19 percent of the market. With an increasing market, a wide range of applications with varying degrees of resolution are in demand. Therefore, there is sufficient motivation for developing...
    Resource Type:
    Masters Thesis
    Full Text:
    the School of Electrical Engineering and Computer Science LJuO Dean of the G ~ate School I

  • Low noise clocking for high speed serial links

    Creator:
    Brownlee, Merrick
    Abstract:
    As the functionality of digital chips continues to increase dramatically, chip- to-chip communication bandwidths must scale accordingly to avoid constraining the overall system performance. Therefore, high speed transceiver design has be- come an important research topic. In particular, the performance of the circuits that are responsible for timing accuracy are...
    Resource Type:
    Dissertation
    Full Text:
    response. 58 5.24 .1, m, W3dB, and wa as a function of x. 59 6.1 Proposed bang-bang CDR. (a) Phase

  • Efficient use of time information in analog-to-digital converters

    Creator:
    Hu, Yue
    Abstract:
    Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information being carried by binary voltage, time-domain operation is much less sensitive to voltage noise compared to conventional voltage domain operation. However, for analog-to-digital converter (ADC)...
    Resource Type:
    Dissertation
    Full Text:
    Filtering Vin(t) Fout[n] Ref N-Stage Ring Oscillator 1-Z -1 Sample D A C E le m e n t Barrel

  • Comparison of time-domain and frequency-domain phase noise analyses

    Creator:
    Vytyaz, Igor
    Abstract:
    This thesis presents a comparison of time-domain and frequency-domain algorithms for phase noise calculation in oscillators. Floquet theory provides the mathematical foundation for these calculations and the numerical methods employ perturbation projection vectors (PPVs). The PPVs are an estimate of an oscillator's sensitivity to noise. The in-house circuit simulator SPICE3...
    Resource Type:
    Masters Thesis
    Full Text:
    matrices Φ(t+T, t) are similar, i.e., they are related to each other by a similarity transformation M−1ΦM

  • Next generation analog-to-digital conversion using time-based encoding and digital synthesis techniques

    Creator:
    Muhlestein, Jason, Russell
    Abstract:
    The internet-of-things is a growing market segment which is based on an arrayof portable communication devices with high power efficiency. Advanced semiconductortechnology can easily improve their digital performance, but the samecannot be said for the analog blocks which are vital to their operation. Highperformance analog circuits continue to use conventional...
    Resource Type:
    Dissertation

  • Ring Amplifier Design Techniques for High-Precision and High-Speed Amplification

    Creator:
    Leuenberger, Spencer
    Abstract:
    Demands of today's integrated society dependent on communication systems have driven the creation of ever more efficient analog-to-digital converters. For the same reasons, digital circuitry has rapidly expanded to serve all the different systems and needs of consumers. The trend of technology development has been to make these digital circuits...
    Resource Type:
    Dissertation
    Full Text:
    switched-capacitor circuit is presented. In the sampling phase (Φs), the input signal is sam- pled onto M