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  • Low-voltage pipeline A/D converter

    Creator:
    Wu, Lei
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor (SC) circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low voltage conditions. There exist three techniques to solve the problem, but with their...
    Resource Type:
    Masters Thesis
    Full Text:
    Low-voltage pipeline A/D converter AN ABSTRACT OF THE THESIS

  • Area efficient D/A converters for accurate DC operation

    Creator:
    Greenley, Brandon Royce
    Abstract:
    The design of mixed-signal integrated circuits has evolved from simple analog and digital circuits operating on the same silicon substrate to the point that now we have complete system on a chip solutions for communication systems. The levels of integration needed to remain cost effective in today's integrated circuit (IC)...
    Resource Type:
    Masters Thesis
    Full Text:
    Efficient D/A Converters For Accurate DC Operation. Abstract approved: Un-Ku Moon The design of mixed

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis
    Full Text:
    . Title: A 10 Bit Algorithmic A/D Converter for a Bio-sensor Abstract approved: Gabor C. Temes and Un-Ku

  • Ring Amplifier Optimized for High Resolution Analog-to-Digital Converter Applications

    Creator:
    ElShater, Ahmed O.
    Abstract:
    In recent years, SAR ADCs have been shown to acheive faster conversion times and improved power efficiencies due to their simple building blocks that are digital in nature and scale favorably with technology. High resolution ADCs with stringent noise requirement has led to the adoption of hybrid ADC architectures such...
    Resource Type:
    Dissertation
    Full Text:
    AN ABSTRACT OF THE DISSERTATION OF Ahmed O. ElShater for the

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    thesis describes the problems of extending bandwidth without losing accu- racy in z A/D converters, and

  • Characterization of a digital phase locked loop and a stochastic time to digital converter

    Creator:
    Geissenhainer, Erik D.
    Abstract:
    A digital phase locked loop (DPLL) and a statistical time-to-digital converter (STDC) were previously fabricated in a 0.35µm, 3.3V SOI CMOS process. This work summarizes these designs and characterizes the measured performance. Simulations supplement the measurements where applicable. The DPLL was found to reach a locked state under a limited...
    Resource Type:
    Masters Thesis
    Full Text:
    Erik D Geissenhainer for the degree of Master of Science in Electrical and Computer Engineering

  • Low power high resolution data converter in digital CMOS technology

    Creator:
    Zheng, Zhiliang
    Abstract:
    The advance of digital IC technology has been very fast, as shown by rapid development of DSP, digital communication and digital VLSI. Within electronic signal processing, analog-to-digital conversion is a key function, which converts the analog signal into digital form for further processing. Recently, low-voltage and low-power have become also...
    Resource Type:
    Masters Thesis
    Full Text:
    multiplier v0--o +Vref -Vref Figure 2.1: Cyclic A/D converter. The cyclic analog-to-digital converter

  • Low voltage switched capacitor circuits for lowpass and bandpass [delta sigma] converters

    Creator:
    Keskin, Mustafa
    Abstract:
    The most accurate method for performing analog signal processing in MOS (metal-oxide-semiconductor) integrated circuits is through the use of switched-capacitor circuits. A switched-capacitor circuit operates as a discrete-time signal processor. These circuits have been used in a variety of applications, such as filters, gain stages, voltage-controlled oscillators, and modulators. A...
    Resource Type:
    Dissertation
    Full Text:
    are used to digitize the received analog signal at an intermediate center frequency. Such converters

  • Error canceling low voltage SAR-ADC

    Creator:
    Wen, Jianping
    Abstract:
    The design of a switched capacitor successive approximation A/D converter is discussed in this thesis. This design adopts a novel capacitance mismatch error cancellation algorithm proposed in references [25, 27]. Detailed charge domain analysis is given in this thesis, which results in an improvement of the proposed algorithm by tracing...
    Resource Type:
    Masters Thesis
    Full Text:
    , Gabor C. Temes The design of a switched capacitor successive approximation A/D converter is discussed

  • Power-Efficient Design Techniques and Architectures for Scalable Submicron Analog Circuits

    Creator:
    Xu, Yang
    Abstract:
    As the CMOS process scales down to submicron, digital circuit performance improves, while reduced supply voltage and lower transistor intrinsic gain make it difficult to implement analog circuits in a power efficient manner. Therefore, it has become advantageous to shift more analog signal processing functions conventionally realized in voltage (analog)...
    Resource Type:
    Dissertation
    Full Text:
    -overlapping clock scheme. Flexible tunability in both center frequency and -3dB bandwidth is achieved with a