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Filtering by: Creator Springston, S. R. Remove constraint Creator: Springston, S. R. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications

    Creator:
    Xiao, Ying
    Abstract:
    A novel switched-R-MOSFET-C input branch is proposed for low-voltage and high-linearity applications. The tunability is achieved by varying the clock duty cycle using an automatic tuning circuit. This tuning method does not involve a change in gate voltage, and is therefore particularly suitable for low-voltage applications. The advantages of the...
    Resource Type:
    Masters Thesis
    Full Text:
    ) R2/ V, (s i = - / R, V (s) out 'I l + (a I R1)sC in (Eq. 2.15) Transforming equation Eq. 2.15

  • A 1V 40mA Fast Transient Capless LDO with 7uA Quiescent Current in 180nm CMOS using Ring Amplifier with Adaptive Damping

    Creator:
    Xiao, Bohui
    Abstract:
    Ring amplification has emerged as an efficient technique to drive large capacitive loads in switched capacitor circuits. We propose circuit techniques to demonstrate the first application of a ring amplifier in a non-capacitive feedback system of a LDO. These techniques enable a simple cap-less LDO structure in 180nm CMOS that...
    Resource Type:
    Masters Thesis
    Full Text:
    . 2017. 3. M. Huang, Y. Lu, S. U and R. P. Martins, “An output-capacitor-free analog- assisted digital

  • Power-efficient two-step pipelined analog-to-digital conversion

    Creator:
    Lee, Ho-Young
    Abstract:
    Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which...
    Resource Type:
    Dissertation
    Full Text:
    MDAC1 MDAC2 MDAC3Vin F L A S H 1 F L A S H 2 F L A S H 3 F L A S H 4 R e s . L a d d e

  • Low voltage techniques for pipelined analog-to-digital converters

    Creator:
    Carnes, Joshua Kenneth
    Abstract:
    To realize pipelined ADCs in deep-submicron processes, low voltage techniques must be developed to work around problems created by limited supply voltages such as the floating switch dead zone, reduced SNR, and reduced OpAmp performance. This thesis analyzes standard and low voltage design issues for pipelined ADCs and proposes a...
    Resource Type:
    Masters Thesis
    Full Text:
    ( ) ⎥ ⎥ ⎦ ⎤ ⎢ ⎢ ⎣ ⎡ +⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ +⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + +++ = F 2 F D D 2 F S su2 F FPDS2 nSo R C CR C CRkT C CCCCkTv ω (11) ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ ++⋅ α

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    delta-sigma ADC, a 0.9 V, 10-bit, 20MS/s CMOS pipelined ADC and a 2.4 V, 12-bit, 10MS/s CMOS pipelined

  • High-performance Ring Amplifier based Analog-to-Digital Converters

    Creator:
    Hu, Hang
    Abstract:
    Ring Amplifier serves as a great candidate both for precision amplification and fast integration in the discrete time system. It can be utilized in high-performance analog-to-digital converters (ADCs). In high-speed ADC utilizing pipelined architectures with residue amplification, Successive-Approximation Register (SAR) ADCs as the sub-ADC and power efficient Ring Amplifier based...
    Resource Type:
    Dissertation
    Full Text:
    -channel GS/s 12-bit passive-assisted high- speed pipelined-SAR ADC with the low-power three-stage

  • Ring Amplifier Optimized for High Resolution Analog-to-Digital Converter Applications

    Creator:
    ElShater, Ahmed O.
    Abstract:
    In recent years, SAR ADCs have been shown to acheive faster conversion times and improved power efficiencies due to their simple building blocks that are digital in nature and scale favorably with technology. High resolution ADCs with stringent noise requirement has led to the adoption of hybrid ADC architectures such...
    Resource Type:
    Dissertation
    Full Text:
    implemented in 0.18µm technology achieves a DR of 95dB and a Schreier FOM better than 180dB at both 2MS/s and

  • Low-power design techniques for low-voltage analog-to-digital converters

    Creator:
    Kim, Min Gyu
    Abstract:
    The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
    Resource Type:
    Dissertation
    Full Text:
    -loop. A 0.9V 92dB delta-sigma audio ADC and a 10MS/s 11-b algorithmic ADC were implemented to

  • Low-voltage pipeline A/D converter

    Creator:
    Wu, Lei
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor (SC) circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low voltage conditions. There exist three techniques to solve the problem, but with their...
    Resource Type:
    Masters Thesis
    Full Text:
    scheme over the switched-opamp technique, a 10-bit 20 MS/s pipeline A/D converter operating at 1.5 V

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
    Full Text:
    at 20 MS/s. Built in 1P4M 0.18 µm technology and operating at 1.3 V sup- ply, the ADC consumes 5.9