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Filtering by: Creator Wolhowe, M. D. Remove constraint Creator: Wolhowe, M. D. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Low-voltage pipeline A/D converter

    Creator:
    Wu, Lei
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor (SC) circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low voltage conditions. There exist three techniques to solve the problem, but with their...
    Resource Type:
    Masters Thesis
    Full Text:
    Low-voltage pipeline A/D converter AN ABSTRACT OF THE THESIS

  • Area efficient D/A converters for accurate DC operation

    Creator:
    Greenley, Brandon Royce
    Abstract:
    The design of mixed-signal integrated circuits has evolved from simple analog and digital circuits operating on the same silicon substrate to the point that now we have complete system on a chip solutions for communication systems. The levels of integration needed to remain cost effective in today's integrated circuit (IC)...
    Resource Type:
    Masters Thesis
    Full Text:
    Efficient D/A Converters For Accurate DC Operation. Abstract approved: Un-Ku Moon The design of mixed

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis
    Full Text:
    . Title: A 10 Bit Algorithmic A/D Converter for a Bio-sensor Abstract approved: Gabor C. Temes and Un-Ku

  • Characterization of a digital phase locked loop and a stochastic time to digital converter

    Creator:
    Geissenhainer, Erik D.
    Abstract:
    A digital phase locked loop (DPLL) and a statistical time-to-digital converter (STDC) were previously fabricated in a 0.35µm, 3.3V SOI CMOS process. This work summarizes these designs and characterizes the measured performance. Simulations supplement the measurements where applicable. The DPLL was found to reach a locked state under a limited...
    Resource Type:
    Masters Thesis
    Full Text:
    Erik D Geissenhainer for the degree of Master of Science in Electrical and Computer Engineering

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    thesis describes the problems of extending bandwidth without losing accu- racy in z A/D converters, and

  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    never have materialised. I also want to thank Prof. Huaping Liu, Roger Traylor and Prof. William M

  • Low power high resolution data converter in digital CMOS technology

    Creator:
    Zheng, Zhiliang
    Abstract:
    The advance of digital IC technology has been very fast, as shown by rapid development of DSP, digital communication and digital VLSI. Within electronic signal processing, analog-to-digital conversion is a key function, which converts the analog signal into digital form for further processing. Recently, low-voltage and low-power have become also...
    Resource Type:
    Masters Thesis
    Full Text:
    design of low-power high- performance A/D converters in CMOS technology, and the non-ideal switched

  • Error canceling low voltage SAR-ADC

    Creator:
    Wen, Jianping
    Abstract:
    The design of a switched capacitor successive approximation A/D converter is discussed in this thesis. This design adopts a novel capacitance mismatch error cancellation algorithm proposed in references [25, 27]. Detailed charge domain analysis is given in this thesis, which results in an improvement of the proposed algorithm by tracing...
    Resource Type:
    Masters Thesis
    Full Text:
    , Gabor C. Temes The design of a switched capacitor successive approximation A/D converter is discussed

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    P S D Y (f ) BW (a) (b) Figure 2.11: First-order DT ∆ΣM: (a) Circuit implementation and and (b

  • OP-AMP free SC biquad LPF and delta-sigma ADC

    Creator:
    Yoo, Kiseok
    Abstract:
    The objective of this work is to explore the feasibility of replacing conventional op-amps with inverters in switched-capacitor (SC) circuits. In order to verify the idea, a low-pass filter (LPF) and a second-order delta-sigma (∆Σ) analog-todigital converter (ADC) are designed in the 0.5-m CMOS technology. The low-pass filter structure is...
    Resource Type:
    Masters Thesis
    Full Text:
    n of in ve rt er b as ed se co nd o rd e r de lta -s ig m a A D C VOUT VIN