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Filtering by: Creator Nichols, John W. Remove constraint Creator: Nichols, John W. Advisor Temes, Gabor C. Remove constraint Advisor: Temes, Gabor C. Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • 5th-Order Elliptic LPF Using Passive Charge Compensation Technique (PCC) Design

    Creator:
    Tsai, Cheng H.
    Abstract:
    The passive charge compensation (PCC) technique was introduced for switched capacitor (SC) circuit to increase the slew rate and enhance the linearity performance, as PCC techniques are used on the Delta-Sigma modulator (DSM) in ADC circuitry. The PCC technique of the project was applied to the design of a SC...
    Resource Type:
    Masters Thesis
    Full Text:
    (3.29) Assuming the length of the channel to be minimum i.e., L = 0.18 µm, then W = 0.54 µm

  • Active Noise Shaping Analog-to-Digital Data Converters

    Creator:
    Shi, Lukang
    Abstract:
    Successive-approximation-register (SAR) analog-to-digital converters are popular for medium accuracy, medium speed and low power applications, such as in biomedical applications. They have low latency and simple architecture compared with ΔΣ ADCs. This is because of SAR ADCs’ binary searching scheme. Furthermore, SAR ADCs can apply oversampling and noise shaping schemes...
    Resource Type:
    Dissertation
    Full Text:
    ........................................................... 5 Fig. 2.3 SAR ADC with binary weighted DAC w/ attenuation cap ............................ 6

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
    Full Text:
    Figure 3.10: PSD of the output signal of the two ΔΣ ADCs W/ and W/O SLD......... 41 Figure 3.11: (a

  • Linearity enhancement techniques for data converters

    Creator:
    Cao, Jinzhou
    Abstract:
    Data converters are essential interface circuits between the analog world that people live in and the digital processors that people live with. Linearity, which often is a tradeoff against other performance criteria, is one of the major performance demands from applications for both analog-to-digital converts (ADC) and digital-to-analog converters (DAC)....
    Resource Type:
    Dissertation

  • Low-power successive approximation analog to digital converter with digital calibration

    Creator:
    Li, Wei
    Abstract:
    IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
    Resource Type:
    Dissertation
    Full Text:
    ]: 2 ENOB s W f Power FoM 2  (1-1) where 02.6 76.1  SNDR ENOB

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    pipeline SAR ADC with capacitive DACs Pipeline SAR ADC w/ Cap DACs 33 Fig. 2-22. The

  • Effects and compensation of the analog integrator nonidealities in dual-quantization delta-sigma modulators

    Creator:
    Yang, Yaohua, 1969-
    Resource Type:
    Masters Thesis

  • Oversampling digital-to-analog converters

    Creator:
    Shu, Shaofeng
    Abstract:
    Oversampling and noise-shaping methods for digital-to-analog (D/A) conversion have been widely accepted as methods of choice in high performance data conversion applications. In this thesis, the fundamentals of D/A conversion and oversampling D/A conversion were discussed, along with the detailed analysis and comparison of the reported state-of-the-art oversampling D/A converters....
    Resource Type:
    Dissertation
    Full Text:
    hand calculations. Prof. John Kenney explained to me the dynamic element matching technique. Prof

  • Improved design techniques for low-voltage low-power switched-capacitor delta-sigma modulators

    Creator:
    Grilo, Jorge
    Abstract:
    This dissertation investigates the constraints which arise when switched-capacitor (SC) delta-sigma modulators are designed for low-voltage operation, targeting also low power dissipation, and proposes methods of improving the performance and optimizing for low power dissipation. This is accomplished by identifying critical elements whose performance can lead to increased power dissipation,...
    Resource Type:
    Dissertation
    Full Text:
    noise sources [23]: P. = / 2 1 rw (S (w) IHi(c0)12)do.) (2.7) 7r bw e where Set represents the

  • Analysis and measurement of charge injection in switched-capacitor circuits

    Creator:
    Shen, Min
    Abstract:
    It has been verified by theoretical analysis, circuit simulation and test that two switch transistors in parallel in a simple sample and hold circuit can be achieve high speed with low error voltage due to charge injection. The wide transistor provides low RC time constant when it is closed and...
    Resource Type:
    Masters Thesis
    Full Text:
    slope dv/dt.L-W 7 The closed-form solution to Eq. (2.2) before the wide switch opens is Cox 1Co