Search Constraints

Start Over
Filtering by: Creator Johnston%2C Chlo%C3%A9 Z. Remove constraint Creator: Johnston%2C Chlo%C3%A9 Z. Advisor Temes, Gabor C. Remove constraint Advisor: Temes, Gabor C.

Search Results

  • Active Noise Shaping Analog-to-Digital Data Converters

    Creator:
    Shi, Lukang
    Abstract:
    Successive-approximation-register (SAR) analog-to-digital converters are popular for medium accuracy, medium speed and low power applications, such as in biomedical applications. They have low latency and simple architecture compared with ΔΣ ADCs. This is because of SAR ADCs’ binary searching scheme. Furthermore, SAR ADCs can apply oversampling and noise shaping schemes...
    Resource Type:
    Dissertation
    Full Text:
    and Prof. Moon as my advisors. I really appreciate Professor Matthew Johnston, Professor Tejasvi

  • 5th-Order Elliptic LPF Using Passive Charge Compensation Technique (PCC) Design

    Creator:
    Tsai, Cheng H.
    Abstract:
    The passive charge compensation (PCC) technique was introduced for switched capacitor (SC) circuit to increase the slew rate and enhance the linearity performance, as PCC techniques are used on the Delta-Sigma modulator (DSM) in ADC circuitry. The PCC technique of the project was applied to the design of a SC...
    Resource Type:
    Masters Thesis
    Full Text:
    . I would also like to thank Prof. Alan Wang, Prof. Anne Trehu, and Prof. Matthew Johnston for

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
    Resource Type:
    Dissertation
    Full Text:
    . program committee members Pro- fessor Un-Ku Moon, Professor Arun Natarajan, Porfessor Matthew Johnston

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    Matthew Johnston, Professor Thinh Nguyen and Professor Huaping Liu for serving in my committee and

  • Switched Capacitor Circuit Techniques for High Performance CMOS Analog Circuits

    Creator:
    Kareppagoudr, Manjunath
    Abstract:
    Switched capacitor (SC) circuits are the main building blocks in many structures such as filters, data converters, sampling circuits and sampled-data amplifiers. The key challenge is to design such circuits which are the prime components of any IoT system with low power consumption without compromising on the performance. In this...
    Resource Type:
    Dissertation
    Full Text:
    to thank Prof Matthew Johnston for all the suggestions in research and managing AMS lab with utmost

  • Design techniques for low power ADCs

    Creator:
    Yu, Wenhuan
    Abstract:
    This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the noise performance of the incremental ADC, and a new optimization technique was proposed to minimize the output noise. In the calibration mode, the incremental ADC...
    Resource Type:
    Dissertation
    Full Text:
    . 9 d(k) v3[k] U z-1 1-z-1 z-1 1-z-1 z-1 1-z-1 c1 c2 a1 a2 a3b b Q DAC Q(z) 1/(1-z

  • Compensation techniques for cascaded delta-sigma A/D converters and high-performance switched-capacitor circuits

    Creator:
    Sun, Tao
    Abstract:
    This thesis describes compensation techniques for cascaded delta-sigma A/D converters (ADCs) and high-performance switched-capacitor (SC) circuits. Various correlated-double-sampling (CDS) techniques are presented to reduce the effects of the nonidealities, such as clock feedthrough, charge injection, opamp input-referred noise and offset, and finite opamp gain, in SC circuits. A CDS technique...
    Resource Type:
    Dissertation
    Full Text:
    vow can be written in the z-domain as Vout(z) = ( 1 z 1 ) 17,(z). (2.1) where Vout(z) and V,i(z

  • Noise coupling techniques in multi-cell delta-sigma modulators

    Creator:
    Bonu, Madhulatha
    Abstract:
    High performance multi-cell delta-sigma modulators are a preferred choice in applications which require programmability. Multi-cell delta-sigma modulators with M unit cells provide 10log10(M) SQNR improvement for the same thermal noise and bias power due to the uncorrelated quantization noises of the M unit ADCs. This concept is used in this...
    Resource Type:
    Masters Thesis
    Full Text:
    .............................................................. 56 4.28 Z domain block diagram for implementation

  • Design techniques for wideband low-power Delta-Sigma analog-to-digital converters

    Creator:
    Wang, Yan
    Abstract:
    Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems,high-definition television and radar systems. There are two general realizations...
    Resource Type:
    Dissertation
    Full Text:
    6.3 The adder circuit with the z-1 delay cell

  • A 10 bit algorithmic A/D converter for a biosensor

    Creator:
    Rengachari, Thirumalai
    Abstract:
    This thesis presents a novel algorithmic A/D converter to be used in a biosensor. The converter is capable of a conversion rate of 1.5 bits/phase and hence the required conversion time is reduced. The proposed architecture is analyzed for non-ideal effects and compared with existing algorithmic A/D architectures. The converter...
    Resource Type:
    Masters Thesis
    Full Text:
    converter. The converter uses a z loop and hence does not require accurate components. It requires only a