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Filtering by: Creator Hawkins, L. N. Remove constraint Creator: Hawkins, L. N. Committee Member Bose, Bella Remove constraint Committee Member: Bose, Bella

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  • Implementation of processor allocation in an N-Cube multiprocessor on Macintosh

    Creator:
    Liu, Jinyue
    Abstract:
    The processor allocation in an n-dimensional hypercube multiprocessor using buddy strategy, gray code strategy, and a new strategy is implemented on Macintosh. Our implementations show that when processor relinquishment is not considered (i.e. static allocation), all these strategies are optimal in the sense that each incoming request sequence is always...
    Resource Type:
    Capstone Project
    Full Text:
    State University Corvallis, Oregon April, 1990 l fl n n n n I l d 1 I IH d l J u

  • Target-based coverage extension of 802.11 MANETs via constrained UAV mobility

    Creator:
    Johnson, Taylor N.
    Abstract:
    MANETs are known to be useful in situations where mobile nodes need to communicate and coordinate in dynamic environments with no access to fixed network infrastructure. However, connectivity problems can occur when sub-groups within a MANET move out of communication range from one another. The increasingly prolific use of UAVs...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF Taylor N. Johnson for the

  • Dynamic and Dual Streaming Methods for H.264 Video and Parallel Performance Modeling

    Creator:
    Johnson, Taylor N.
    Abstract:
    Traditional approaches to streaming H.264 video over a network typically rely on a single method of transport (i.e., reliable or unreliable) and/or use static values for parameters that can have a significant negative impact on the perceptual quality of the received video. This dissertation presents a dynamic method for wireless...
    Resource Type:
    Dissertation
    Full Text:
    AN ABSTRACT OF THE DISSERTATION OF Taylor N. Johnson for the

  • Low-power dynamic CMOS circuits in high-performance memory arrays

    Creator:
    Patwary, Md. Ataur R.
    Abstract:
    Dynamic CMOS circuits are commonly used in high-performance memory arrays to implement wide-NOR logic functions for their read and search operations. This is because dynamic circuits have significantly higher speed and lower area compared to static circuits for performing similar operations. Register File (RF) arrays are located at the top...
    Resource Type:
    Dissertation
    Full Text:
    Access NMOS Device Size N o rm a li z e d L B L D e la y 4 PDN/LBL 8 PDN/LBL 16 PDN/LBL 32

  • The dynamic speculation and performance prediction of parallel loops

    Creator:
    Zier, David A.
    Abstract:
    General purpose computer systems have seen increased performance potential through the parallel processing capabilities of multicore processors. Yet this potential performance can only be attained through parallel applications, thus forcing software developers to rethink how everyday applications are designed. The most readily form of Thread Level Parallelism (TLP) within any...
    Resource Type:
    Dissertation

  • 802.11 Channel Switching for High-Definition Video Streaming

    Creator:
    Sullivan, Erin
    Abstract:
    As screen resolution and video decoding capability have increased, high-definition (HD) video in resolutions as high as 1920 x 1080 is rapidly becoming the standard. Ad-hoc streaming of HD video over 802.11 wireless networks, e.g., streaming from a mobile device to a television, is convenient for users, but is hampered...
    Resource Type:
    Masters Thesis
    Full Text:
    transmission include N-screens systems, where multiple multimedia feeds and other data streams can be shared

  • Maximum flow in planar digraphs

    Creator:
    Harutyunyan, Anna
    Abstract:
    Worst-case analysis is often meaningless in practice. Some problems never reach the anticipated worst-case complexity. Other solutions get bogged down with impractical constants during implementation, despite having favorable asymptotic running times. In this thesis, we investigate these contrasts in the context of finding maximum flows in planar digraphs. We suggest...
    Resource Type:
    Masters Thesis
    Full Text:
    planar graphs is an augmenting- paths algorithm with O(n) iterations. Using dynamic trees, each

  • Low-complexity high-speed VLSI design of low-density parity-check decoders

    Creator:
    Cui, Zhiqiang
    Abstract:
    Low-Density Parity-check (LDPC) codes have attracted considerable attention due to their capacity approaching performance over AWGN channel and highly parallelizable decoding schemes. They have been considered in a variety of industry standards for the next generation communication systems. In general, LDPC codes achieve outstanding performance with large codeword lengths (e.g.,...
    Resource Type:
    Dissertation
    Full Text:
    , { 1k10 −ggg ,,, L }, span the (n, k) LDPC code. For a generator matrix G, there exists a kkn

  • Responder tracking application

    Creator:
    Wanalertlak, Naroot
    Abstract:
    We have developed a prototype web-based GIS application for tracking the locations of moving entities. This application, which is called the Responder application, consists of two parts: the Responder client and the Responder server. The Responder client is a .NET application written in C#. It reads the location data from...
    Resource Type:
    Capstone Project
    Full Text:
    l n n n n l 1 ) I I I J J I J u

  • Task Grapher : task graph scheduling in multiprocessor computer systems

    Creator:
    Chu, Lee-Jung Julie
    Abstract:
    This report presents a graphical tool for implementation of the scheduling heuristics provided by Kruatrachue. The input of scheduling is a task graph and the output is a schedule in the form of a Gantt chart. The implemented scheduling heuristics are: 1) Hu's HLF (highest level first) algorithm. 2) Yu's...
    Resource Type:
    Capstone Project
    Full Text:
    l 11 n n [J n I r I I I I I i I I I I I