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Filtering by: DOI 10.1007/s12230-014-9378-8 Remove constraint DOI: 10.1007/s12230-014-9378-8 Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • Generalized radix design techniques for low-power, low voltage pipelined and cyclic analog-digital converters

    Creator:
    Sharma, Vivek
    Abstract:
    This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
    Resource Type:
    Masters Thesis
    Full Text:
    ADC Characteristics.......................................................................... 8

  • High-speed CMOS dual-modulus presalers for frequency synthesis

    Creator:
    Desikachari, Ranganathan
    Abstract:
    Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
    Resource Type:
    Masters Thesis
    Full Text:
    the performance of integrated prescalers using the current mode style of operation. An 8/9 dual

  • Development of a CZT-Silicon Detection System in Support of the Comprehensive Nuclear-Test-Ban Treaty

    Creator:
    Alhawsawi, Abdulsalam M.
    Abstract:
    The Comprehensive Nuclear-Test-Ban Treaty (CTBT) bans all nuclear explosion tests for military or civilian purposes. The International Monitoring System (IMS) was established to verify compliance with the treaty. It consists of several monitoring stations that detect: seismic activities, hydrocoustic activities, infrasound waves, and radionuclide particles and noble gases. Radioxenon detection...
    Resource Type:
    Dissertation
    Full Text:
    resolution. DPP8 is an 8- channel, 125 MHz digital signal processor with a 14-bit ADC resolution. A

  • Design techniques for low-power multi-GS/s analog-to-digital converters

    Creator:
    Jiang, Tao
    Abstract:
    Ultra-high-speed (>10GS/s), medium-resolution (5~6bit), low-power (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and next-generation serial link receivers. There are several challenges to enable a successful design, however. First, the time-interleaved architecture is required in order to achieve over 10GS/s sampling rate, with the trade-off...
    Resource Type:
    Dissertation
    Full Text:
    previous work of sub-ADC, a 12-GS/s 5-b 50-mW ADC is designed in 40nm CMOS with 8 time-interleaved

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    8 MHz bandwidth. The achieved peak SNDR is 80.54 dB and SFDR is 94 dB. Finally a 3rd order

  • Adaptive Streaming Methods using Dual Protocols and Reinforcement Learning

    Creator:
    Gatimu, Kevin
    Abstract:
    The ubiquity of high quality video and proliferation of mobile devices has contributed to an unprecedented rise in video consumption. HTTP, in conjunction with adaptive streaming, has become the de facto mechanism for delivering the vast majority of video as it readily caters to heterogeneous networks and devices. This dissertation...
    Resource Type:
    Dissertation
    Full Text:
    Simulation Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Conclusion and

  • Model development via delay extraction for the time-domain simulation of lossy transmission lines.

    Creator:
    Blevins, Chris
    Abstract:
    This thesis presents two new approaches for the broadband, time-domain modeling of lossy transmission lines. Each approach is based on an alternative derivation of delay extraction in order to separate the line's linear phase from its attenuation and dispersion. Augmentation networks represent the derived attenuation networks as rational function approximations....
    Resource Type:
    Masters Thesis
    Full Text:
    Extraction............................................................................. 8 1.4 OVERVIEW

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    ...............................................................................................8 3.1 Register File Model

  • Efficient VLSI architectures for MIMO and cryptography systems

    Creator:
    Li, Qingwei
    Abstract:
    Multiple-input multiple-output (MIMO) communication systems have recently been considered as one of the most significant technology breakthroughs for modern wireless communications, due to the higher spectral efficiency and improved link reliability. The sphere decoding algorithm (SDA) has been widely used for maximum likelihood (ML) detection in MIMO systems. It is...
    Resource Type:
    Dissertation
    Full Text:
    ......................................................................8 1.2.2 Asymmetric Key Cryptography

  • Advanced propulsion systems for linear motion with high performance requirements

    Creator:
    Zhou, Xiaolin
    Abstract:
    Traditionally linear actuator applications are addressed by the use of hydraulic systems. The high maintenance cost and poor reliability will always be the most critical problem in the real applications. Benefited from both the high mechanical advantage of the roll screw and the simple structure of the switched reluctance motor,...
    Resource Type:
    Dissertation
    Full Text:
    ........................................................................................ 69 8 CHAPTER CONCLUSION