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Filtering by: Creator Walden, John B. Remove constraint Creator: Walden, John B. Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF John A. Liebert for the degree of Master of Science in Electrical

  • Low-power high-resolution delta-sigma ADC design techniques

    Creator:
    Wang, Tao
    Abstract:
    This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to the conventional active adder, the direct charge transfer (DCT) adder greatly saves power by keeping the feedback factor of the active adder unity. However, the...
    Resource Type:
    Dissertation
    Full Text:
    to me. I am grateful to Prof. Pavan Kumar Hanumolu, Prof. Huaping Liu, Prof. John F. Conley, Jr

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    total power consumption was 250 nW from a 0.75V supply voltage. This gives a Walden FoM of 28.8 fJ

  • Side channel attack resistant elliptic curves cryptosystem on multi-cores for power efficiency

    Creator:
    Yoo, Jaewon
    Abstract:
    The Advent of multi-cores allows programs to be executed much faster than before. Cryptoalgorithms use long-bit words thus parallelizing these operations on multi-cores will achieve significant performance improvement. However, not all long-bit word operations in cryptosystems are suitable for parallel execution on multi-cores. In particular, long-bit words used in Elliptic...
    Resource Type:
    Masters Thesis
    Full Text:
    appreciation to Professor Huaiping Liu, Traylor Roger, and John A. Nairn for their serving in my graduate

  • Model development via delay extraction for the time-domain simulation of lossy transmission lines.

    Creator:
    Blevins, Chris
    Abstract:
    This thesis presents two new approaches for the broadband, time-domain modeling of lossy transmission lines. Each approach is based on an alternative derivation of delay extraction in order to separate the line's linear phase from its attenuation and dispersion. Augmentation networks represent the derived attenuation networks as rational function approximations....
    Resource Type:
    Masters Thesis
    Full Text:
    ................................................................................................................ 111 APPENDIX A LINEAR LEAST-SQUARES DERIVATION .................................. 112 APPENDIX B

  • Surface-Normal Modulation of Fano Resonances in Metallic Photonic Crystals for Free-Space Optical Interconnects

    Creator:
    Ren, Fanghui
    Abstract:
    This dissertation focuses on the development of ultra-compact optical devices for free-space modulation. We propose a surface-normal modulator using metallic photonic crystals for free-space optical interconnects. The active control of light intensity is achieved by engineering the Fano resonances in metallic photonic crystals. Both thermo-optic modulation and electro-optic modulation of...
    Resource Type:
    Dissertation
    Full Text:
    extends to Professor John Conley, Professor Huaping liu, Professor Larry Cheng, and Professor Maggie

  • Analysis and design on low-power multi-Gb/s serial links

    Creator:
    Hu, Kangmin
    Abstract:
    High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most...
    Resource Type:
    Dissertation
    Full Text:
    my doctoral committee and being readers for this dissertation. I am indebted to Professor John

  • Variable sampling compensation of networked control systems with delays using neural networks

    Creator:
    Lopez-Echevarria, Daniel
    Abstract:
    In networked control systems (NCS) information or packets usually flow from a sensor or a set of sensors to a remotely located controller. Then the controller processes the received information and sends a series of control commands to the actuators through a communication network which could be either wireless or...
    Resource Type:
    Dissertation
    Full Text:
    research and stay at Oregon State University. I also want to thank Professor John Schmitt for his

  • Ultra-low power receivers for wireless sensor networks

    Creator:
    Ayers, James S.
    Abstract:
    In wireless sensor network applications, low-power operation of the wireless receiver is critical. To address this need an ultra-low power Binary Frequency Shift Keying (BFSK) receiver using the super-regenerative architecture is developed. A prototype receiver is built and tested for operation in the 900 MHz ISM band. Lab measurements show...
    Resource Type:
    Dissertation
    Full Text:
    . The entire receiver has an energy consumption of only 0.175 nJ/b while operating at 2 Mbps. c

  • Design and analysis techniques for nano-joule ADCs and sampling linearity

    Creator:
    Brown, Thomas (Thomas William)
    Abstract:
    Two aspects of ADC system performance are addressed in this work. First, the combination of the ADC and its associated reference are co-designed for an energy constrained remote sensing system. Second, sampling linearity is mathematically analyzed as a function of frequency to provide enhanced understanding into an ADC's requisite sampling...
    Resource Type:
    Dissertation
    Full Text:
    per stage 9-b cyclic ADC, clock generation, reference buffers, and control logic. A novel Class-AB