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Filtering by: Alternative title ssim Information report 70-5 Remove constraint Alternative title ssim: Information report 70-5 Committee Member Moon, Un-Ku Remove constraint Committee Member: Moon, Un-Ku Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • Enhanced-accuracy oversampled data converters

    Creator:
    Ceballos, Jose Luis
    Abstract:
    Digital-to-analog converters (DACs) suffer from static and dynamic nonlinearity problems, which degrade their accuracy and performance. Mismatch errors in the analog components restrict the maximum achievable linearity. This thesis presents various techniques for correcting these errors. It describes a correction process for the nonlinear behavior of DACs, on three different...
    Resource Type:
    Dissertation
    Full Text:
    …………………………………………………………………... 5 ANALOG AND DIGITAL HARDWARE…………………………………………….…..... 5.1 ANALOG SECTION

  • Design of a 14-bit continuous-time Delta-Sigma A/D modulator with 2.5MHz signal bandwidth

    Creator:
    Li, Zhimin
    Abstract:
    In recent years, there has been growing interest in both industry and academia to use continuous-time (CT) Δ-Σ A/D converters for wideband wireless and wireline communication applications. So far no reported CT Δ-Σ A/D modulator achieves 14-bit or higher dynamic range (DR) with more than 2MHz signal bandwidth (equivalently 4MS/s)....
    Resource Type:
    Dissertation
    Full Text:
    ..............................................................................3 2. OVERVIEW OF OVERSAMPLING Δ-Σ A/D CONVERTERS........................5 2.1 A brief

  • Space time coding in MIMO systems

    Creator:
    Xian, Liang
    Abstract:
    Multiple-input multiple-output (MIMO) antenna technology is promising for high-speed wireless communications without increasing the transmission band- width. Space time coding (STC) is a scheme that employs multiple antennas to increase transmission rate or to improve transmission quality. STC is used widely in mobile cellular networks, wireless local area networks (WLAN)...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 SPACE-TIME BLOCK CODES FROM CYCLIC DESIGN . . . . . . . . . . . . . . 8 2.1 System Model

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    ................................................................................................ 5 1.3 Contribution of this work

  • Techniques for improving timing accuracy of multi-gigahertz track/hold circuits

    Creator:
    Wang, Jingguang
    Abstract:
    Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8 bits resolution are used in many signal communication applications. Unfortunately, the performance of the high speed ADC is limited by the timing accuracy of the sampling clock. A small sampling uncertainty can cause a large error in the sampled voltage and result...
    Resource Type:
    Masters Thesis
    Full Text:
    : ______________________________________________________ Patrick Chiang Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8

  • Adaptive, wideband analog-to-digital conversion for convergent communication systems

    Creator:
    Batten, Robert D., 1973-
    Abstract:
    The exponential rate of advances in modern communication devices in the last several years have brought us higher levels of functionality and performance as well as reductions in physical size and power consumption. To continue this rate of advancement, next generation systems require wider bandwidth and higher resolution ADCs. Additionally,...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . .3 1.2 Block diagram of a single IF radar receiver. . . . . . . . . . . .. . . . 5 1.3 Survey of

  • Design techniques for high efficiency LED drivers

    Creator:
    Bang, Sarvesh Jagdish
    Abstract:
    The increasing popularity of cellular phones with integrated cameras in the recent past has led to major improvements in its image quality. However, integration of new features, such as mobile email, video streaming, MP3 etc. tend to put the limitation on image quality as camera phone designers struggle to manage...
    Resource Type:
    Masters Thesis
    Full Text:
    4.8 5 5.2 0 10 20 30 40 50 60 70 80 90 Input Voltage [V] E ff ic ie n cy [ % ] Figure

  • Low-power techniques for supply-noise mitigation in phase-locked loops

    Creator:
    Arakali, Abhijith
    Abstract:
    Modern day digital systems employ frequency synthesizers to provide a common clock to the system. They are undergoing large scale integration due to which, mitigation of the effect of noise on power supply has become a major design consideration in clocking circuits. Rapid scaling of CMOS technology mandates the design...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Supply Noise in Rest of the PLL Building Blocks . . . . . . . . . . . . . . . . 5 1.3 A Data

  • Design techniques for high-performance digital PLLs and CDRs

    Creator:
    Yin, Wenjing
    Abstract:
    Phase-Locked Loops (PLLs) are essential building blocks in many communication systems. Designing high performance analog PLLs in the presence of technology imposed constraints such as leakage, poor analog transistor behavior, process variability, and low supply voltage is a challenging task. To overcome these drawbacks, digital PLLs (DPLLs) have recently emerged...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 5 Conclusion 86 5.1 Contribution

  • Time-based analog signal processing

    Creator:
    Drost, Brian George
    Abstract:
    As CMOS processes size continues to shrink, a number of factors limit the ability of analog circuit performance to scale with the process. These issues include smaller transistor intrinsic gains and lower supply voltages. However, scaling continues to increase the speed and decrease the power of digital circuits. In this...
    Resource Type:
    Masters Thesis
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . 81 5 Filter Design Using Ring Oscillator Integrators 84 5.1 Improving Integrator Linearity with