Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended counting with a Nyquist-rate ADC. A single-loop incremental ADC was designed and fabricated in 90 nm for a biosensor interface circuit. It incorporates one integrator,...
Ultra-wideband (UWB) radio has become an attractive alternative for wireless communications due to the robustness to multipath fading, low power transmission, mostly-digital implementation, and low cost. Furthermore, short-range, high data-rates applications are possible with UWB radios due to the wide spectral
allocations at 3.1 - 10.6 GHz.
This thesis presents...
In this paper, we propose a credit-based resource allocation technique for dynamic spectrum access (DSA) systems that is robust against malicious and selfi sh behaviors and ensures good overall system fairness performance while also allowing spectrum users to achieve high amounts of service. We also propose a new objective function...
IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
Low-Density Parity-check (LDPC) codes have attracted considerable attention due to their capacity approaching performance over AWGN channel and highly parallelizable decoding schemes. They have been considered in a variety of industry standards for the next generation communication systems. In general, LDPC codes achieve outstanding performance with large codeword lengths (e.g.,...
Data converters are essential interface circuits between the analog world that people live in and the digital processors that people live with. Linearity, which often is a tradeoff against other performance criteria, is one of the major performance demands from applications for both analog-to-digital converts (ADC) and digital-to-analog converters (DAC)....
A relatively new model of error control is the limited magnitude error over high radix channels. In this error model, the error magnitude does not exceed a certain limit known beforehand. In this dissertation, we study systematic error control codes for common channels under the assumption that the maximum error...
Dynamic multithreaded processors attempt to increase the performance of a single
sequential program by dynamically extracting threads from sources such as loop
iterations. The scheduling of instructions in such a processor plays a vital role in the
amount of thread level parallelism that can be extracted and thus the overall...
We study joint nonlinear state estimation with multi-period measurement vectors that are potentially corrupted by sparse gross errors. The identifiability-aware approach is proposed to leverage common characteristics of fundamentally identifiable gross errors to enhance error correction performance. First, we derive a necessary rank condition that the sparsity pattern of any...
Delta-sigma analog-to-digital converters traditionally have been used for low speed, high resolution applications such as measurements, sensors, voice and audio systems. Through continued device scaling in CMOS technology and architectural and circuit level design innovations, they have even become popular for wideband, high dynamic range applications such as wired and...