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Filtering by: Alternative title ssim Circular of information no. 29 Remove constraint Alternative title ssim: Circular of information no. 29 Committee Member Nguyen, Thinh Remove constraint Committee Member: Nguyen, Thinh

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  • Redundant information in a spin system beyond pure decoherence

    Creator:
    Svesko, Andrew M.
    Abstract:
    Quantum physics in the Copenhagen interpretation places an unsatisfying divide between the quantum and classical worlds. Decoherence -- the destruction of superposition states of the system -- helps us understand how the quantum transitions to the classical. Quantum Darwinism builds on decoherence to understand how information about the system is...
    Resource Type:
    Masters Thesis
    Full Text:
    of Master of Science in Physics presented on May 29, 2014. Title: Redundant Information in a Spin

  • Limited magnitude error control codes

    Creator:
    Elarief, Noha
    Abstract:
    A relatively new model of error control is the limited magnitude error over high radix channels. In this error model, the error magnitude does not exceed a certain limit known beforehand. In this dissertation, we study systematic error control codes for common channels under the assumption that the maximum error...
    Resource Type:
    Dissertation
    Full Text:
    shown in Figure 1.1 [13, 16]: (1) An information source generating a sequence of symbols (a message

  • On shortest disjoint paths and Hamiltonian cycles in some interconnection networks

    Creator:
    Hussain, Zaid
    Abstract:
    Parallel processors are classified into two classes: shared-memory multiprocessors and distributed- memory multiprocessors. In the shared-memory system, processors communicate through a common memory unit. However, in the distributed multiprocessor system, each processor has its own memory unit and the communications among the processors are performed through an interconnection network. Thus,...
    Resource Type:
    Dissertation
    Full Text:
    Doctor of Philosophy Presented April 29, 2011 Commencement June 2011 Doctor of Philosophy

  • Predicting and Improving Throughput, Responsiveness and Battery Life of Computer Systems by Machine Learning

    Creator:
    Li, Yunfan
    Abstract:
    The Machine Learning (ML) algorithms are increasingly explored in varies of fields including designing and optimizing computer systems. Recent research, such as optimizing memory/cache prefetching by ML training or predicting traffic pattern in throughput processors, also exhibits a promising future of introducing ML into computer system design and optimization. Throughput...
    Resource Type:
    Dissertation
    Full Text:
    degree of Doctor of Philosophy in Computer Science presented on April 29, 2021. Title: Predicting and

  • Applied color processing

    Creator:
    Zhang, Heng
    Abstract:
    The quality of a digital image pipeline relies greatly on its color reproduction which should at a minimum handle the color constancy, and the final judgment of the excellence of the pipeline is made through subjective observations by humans. This dissertation addresses a few topics surrounding the color processing of...
    Resource Type:
    Dissertation
    Full Text:
    Presented November 29, 2011 Commencement June 2012 Doctor of Philosophy dissertation of

  • High efficiency wideband low-power delta-sigma modulators

    Creator:
    Lee, Sang Hyeon
    Abstract:
    Delta-sigma analog-to-digital converters traditionally have been used for low speed, high resolution applications such as measurements, sensors, voice and audio systems. Through continued device scaling in CMOS technology and architectural and circuit level design innovations, they have even become popular for wideband, high dynamic range applications such as wired and...
    Resource Type:
    Dissertation
    Full Text:
    for the degree of Doctor of Philosophy Presented May 29, 2012 Commencement

  • Instruction fetching, scheduling, and forwarding in a dynamic multithreaded processor

    Creator:
    Browning, Adam W.
    Abstract:
    Dynamic multithreaded processors attempt to increase the performance of a single sequential program by dynamically extracting threads from sources such as loop iterations. The scheduling of instructions in such a processor plays a vital role in the amount of thread level parallelism that can be extracted and thus the overall...
    Resource Type:
    Masters Thesis
    Full Text:
    requirements for the degree of Master of Science Presented September 29, 2006 Commencement June 2007

  • An efficient frequency controlled PFM for DC-DC converters

    Creator:
    Pai, Jeff
    Abstract:
    As more features are being integrated into mobile platforms, the demand for long battery life during standby mode has been increasing. Light load efficiency becomes one of essential features in today's DC-DC converter. The most effective method to improve light load efficiency is to operate the DC-DC converter under pulse-frequency-modulation...
    Resource Type:
    Masters Thesis
    Full Text:
    Presented November 29, 2010 Commencement June 2011 Master of Science thesis of Jeff Pai presented

  • A probabilistic framework and algorithms for modeling and analyzing multi-instance data

    Creator:
    Behmardi, Behrouz
    Abstract:
    Multi-instance data, in which each object (e.g., a document) is a collection of instances (e.g., word), are widespread in machine learning, signal processing, computer vision, bioinformatic, music, and social sciences. Existing probabilistic models, e.g., latent Dirichlet allocation (LDA), probabilistic latent semantic indexing (pLSI), and discrete component analysis (DCA), have been...
    Resource Type:
    Dissertation
    Full Text:
    predict the label of an unseen bag, given the label information of the training bags. On the other hand

  • Power efficient H.264 video decoding in embedded multiprocessor

    Creator:
    Kim, Jihong
    Abstract:
    This thesis presents a novel methodology that enables power efficient video decoding in an embedded system based on MPSoC (Multiprocessor System on Chip). This methodology is a physical combination of parallel processing which reduces power consumption of processors by exploiting thread-level parallelism and Dynamic Voltage Frequency Scaling (DVFS) that allows...
    Resource Type:
    Masters Thesis
    Full Text:
    output of edge filter according to filter parameters based on coding information. 32 bits of P and Q