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Filtering by: Has journal Communications in Computational Physics Remove constraint Has journal: Communications in Computational Physics Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering Subject Parallel processing (Electronic computers) Remove constraint Subject: Parallel processing (Electronic computers)

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  • Cluster partitioning approaches to parallel Monte Carlo simulation on multiprocessors

    Creator:
    Ranawake, Udaya A.
    Abstract:
    We consider the parallelization of Monte Carlo algorithms for analyzing numerical models of charge transport used in semiconductor device physics. Parallel algorithms for the standard k-space Monte Carlo simulation of a three band model of bulk GaAs on hypercube multicomputers are first presented. This Monte Carlo model includes scattering due...
    Resource Type:
    Dissertation
    Full Text:
    models of charge transport used in semiconductor device physics. Parallel algorithms for the standard k

  • Static task scheduling and grain packing in parallel processing systems

    Creator:
    Kruatrachue, Boontee
    Abstract:
    We extend previous results for optimally scheduling concurrent program modules, called tasks, on a fixed, finite number of parallel processors in two fundamental ways: (1) we introduce a new heuristic which considers the time delay imposed by message transmission among concurrently running tasks; and (2) we introduce a second heuristic...
    Resource Type:
    Dissertation
    Full Text:
    versus minimum communication delay. The DSH is also applied in "Grain Packing", which is a new way to

  • Multithreaded virtual processor on DSM

    Creator:
    An, Ho Seok
    Abstract:
    Modern superscalar processors exploit instruction-level parallelism (ILP) by issuing multiple instructions in a single cycle because of increasing demand for higher performance in computing. However, stalls due to cache misses severely degrade the performance by disturbing the exploitation of ILP. Multiprocessors also greatly exacerbate the memory latency problem. In SMPs,...
    Resource Type:
    Masters Thesis
    Full Text:
    abstraction in hardware or software. DSM system hides the remote communication mechanism from the

  • Program allocation for hypercube based dataflow systems

    Creator:
    Freytag, Vincent R.
    Abstract:
    The dataflow model of computation differs from the traditional control-flow model of computation in that it does not utilize a program counter to sequence instructions in a program. Instead, the execution of instructions is based solely on the availability of their operands. Thus, an instruction is executed in a dataflow...
    Resource Type:
    Masters Thesis
    Full Text:
    maximizing parallelism while minimizing interprocessor communication costs. The culmination of research in

  • Allocation of SISAL program graphs to processors using BLAS

    Creator:
    Raisinghani, Manoj H.
    Abstract:
    There are a number of well known techniques for extracting parallelism from a given program. They range from hardware implementations, building restructuring compilers or reorganizing of programs so as to specify all the available parallelism. The success rate of any of the known techniques is rather poor over all types...
    Resource Type:
    Masters Thesis
    Full Text:
    program allocation lies in maximizing parallelism while minimizing interprocessor communication costs

  • Memory optimization for a parallel sorting hardware architecture

    Creator:
    Beyer, Dale A.
    Abstract:
    Sorting is one of the more computationally intensive tasks a computer performs. One of the most effective ways to speed up the task of sorting is by using parallel algorithms. When implementing a parallel algorithm, the designer has to make several decisions. Among the decisions are the algorithm and the...
    Resource Type:
    Masters Thesis
    Full Text:
    architecture AN ABSTRACT OF THE THESIS OF Dale A. Beyer for the degree of Master of Science in Electrical

  • A performance study of multithreading

    Creator:
    Kwak, Hantak
    Abstract:
    As the performance gap between processor and memory grows, memory latency will be a major bottleneck in achieving high processor utilization. Multithreading has emerged as one of the most promising and exciting techniques used to tolerate memory latency by exploiting thread-level parallelism. The question however remains as to how effective...
    Resource Type:
    Dissertation
    Full Text:
    THESIS OF Hantak Kwak for the degree of Doctor of Philosophy in Electrical and Computer Engi- neering