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Filtering by: Subject Amplifiers (Electronics) -- Noise Remove constraint Subject: Amplifiers (Electronics) -- Noise Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4 GHz LNA's

    Creator:
    Hazenboom, Duncan S.
    Abstract:
    Three types of low noise amplifiers operating at 2.4GHz were designed. They are the commonly used single-ended and differential amplifiers as well as a new quasi-differential amplifier. The substrate noise injected into these amplifiers is examined for both heavily and lightly doped CMOS substrates. For the single-ended amplifier the noise...
    Resource Type:
    Masters Thesis
    Full Text:
    - differential amplifier. The substrate noise injected into these amplifiers is examined for both heavily and

  • Dynamic biasing for ring amplification

    Creator:
    Farahbakhshian, Farshad
    Abstract:
    New amplifier architectures are presented using non-traditional methods of biasing. Time-based dynamic biasing and signal-based dynamic biasing are discussed in the context of new architectures. This includes a new form of ring amplification with a dynamic deadzone, allowing for a structure whose coarse path does not consume static power.
    Resource Type:
    Masters Thesis
    Full Text:
    . Title: Dynamic Biasing for Ring Amplification Abstract approved: Un-Ku Moon New amplifier

  • Feedforward noise cancellation techniques

    Creator:
    Yang, Bangda
    Abstract:
    Supply noise is one of the major considerations in almost all analog building blocks. In the past, adequate supply rejection is usually achieved with circuit isolation or excess capacitive coupling. However, this brute force method requires large silicon area and degrades feedback bandwidth. In this study, a method of enhancing...
    Resource Type:
    Masters Thesis
    Full Text:
    NOISE CANCELLATION TECHNIQUES 1. INTRODUCTION Electronic noise in the power supply, or supply

  • A test fixture and deembedding procedure for high-frequency substrate characterization

    Creator:
    Webb, Kyle M.
    Abstract:
    At frequencies exceeding 1-2 GHz, the substrate network models used in substrate coupling simulation must account for the reactive nature of the substrate. Unlike at low frequencies, where the purely resistive substrate models can be validated through DC resistance measurements, these high-frequency models, comprising reactive components, must be validated through...
    Resource Type:
    Masters Thesis
    Full Text:
    market for portable electronic devices, such as cell phones, PDAs, and digital music players, comes a

  • A comparison of substrate noise coupling in heavily doped and lightly doped substrates for mixed-signal circuits

    Creator:
    Ayers, James S.
    Abstract:
    An analysis of substrate noise coupling in mixed-signal circuits has been performed in the TSMC 0.25 [mu]m lightly doped and heavily doped CMOS processes. Methods to minimize noise coupling in both the chip design and board design phases are presented along with techniques for accurate circuit simulation of noise coupling....
    Resource Type:
    Masters Thesis
    Full Text:
    bandwidth of the amplifier is high enough that the 10 MHz noise coupled to the amplifier will not be

  • Prediction of phase noise and jitter in ring oscillators

    Creator:
    Barton, Nathen
    Abstract:
    This thesis presents distinctly different methods of accurately predicting phase noise and absolute jitter in ring oscillators. The phase noise prediction methods are the commercially available SpectreRF and isf_tool, a simulator developed in this work from the Hajimiri and Lee theory of phase noise. Absolute jitter due to deterministic supply...
    Resource Type:
    Masters Thesis
    Full Text:
    of Phase Noise and Jitter in Ring Oscillators. Abstract approved: Mayaram Tern S. Fiei This thesis

  • A stochastic time-to-digital converter for digital phase-locked loops

    Creator:
    Ok, Kerem
    Abstract:
    Digital phase-locked loops (PLLs) have been receiving increasing attention recently due to their ease of integration, scalability and performance comparable to their analog counterparts. In digital PLLs, increased resolution in time-to-digital conversion is desirable for improved noise performance. This work describes the design and simulation of a stochastic time-to-digital converter...
    Resource Type:
    Masters Thesis
    Full Text:
    noise performance. This work describes the design and simulation of a stochastic time-to-digital

  • Digital phase-locked loops for multi-GHz clock generation

    Creator:
    Kratyuk, Volodymyr
    Abstract:
    A digital implementation of a PLL has several advantages compared to its analog counterpart. These include easy scalability with process shrink, elimination of the noise susceptible analog control for a voltage controlled oscillator (VCO) and the inherent noise immunity of digital circuits. Several recent digital PLL (DPLL) implementations have achieved...
    Resource Type:
    Dissertation
    Full Text:
    . These include easy scalability with process shrink, elimination of the noise susceptible analog control

  • Design and computer aided optimization of a fully integrated CMOS RF distributed amplifier

    Creator:
    Ballweber, Brian M.
    Abstract:
    Advancements in the sophistication and complexity of modern electronic systems are creating a need for highly integrated systems with ever higher operational frequencies. The economical demands of these systems dictate that they be implemented using low cost fabrication technologies, such as digital CMOS. One of the major challenges facing circuit...
    Resource Type:
    Masters Thesis
    Full Text:
    & 2.55 GHz) for Amplifier Design #1 95 4.14 Simulated Noise Figure for Amplifier Design #1 96

  • Correlated level shifting as a power-saving method to reduce the effects of finite DC gain and signal swing in opamps

    Creator:
    Gregoire, B. Robert
    Abstract:
    This thesis presents methods to reduce the effects of finite opamp DC gain, output voltage swing limitations in opamps, and component mismatches. The primary contribution of this thesis is a new switched-capacitor method named correlated level shifting (CLS). CLS enables true rail-to-rail operation by storing an estimate of the desired...
    Resource Type:
    Dissertation
    Full Text:
    shows a circuit that models noise in an amplifier by adding the noise to a signal before amplification