The purpose of this work is to develop a new model for LDD
n-MOSFET degradation in drain current under long-term AC use
conditions for lifetime projection which includes a self-limiting
effect in the hot-electron induced device degradation.
Experimental results on LDD n-channel MOSFETs shows that the
maximum drain current degradation...
Reliability of sub-micron analog circuits is directly related to impact ionization and
the subsequent changes in threshold voltage and drain current of n-MOSFET devices.
This thesis presents theory of the hot-electron effects on the device characteristics and
circuit performance, explores several approaches to improve performance at both the
device and...
Hot carrier effects in sub-micron lightly doped drain (LDD) n-channel
MOSFETs under static (DC) stress are studied in order to establish the degradation
mechanisms of such devices. Degradation is monitored as a function of time at various
gate voltages. Under accelerated aging conditions (i.e. large drain voltages) the gate
voltage...
High-accuracy and high-speed CMOS track-and-hold (T/H) or sample-and-hold (S/H) circuits are an important part of the analog-to-digital interface. The switched-capacitor (SC) circuits usually contain one or more op-amps whose dc offset, finite gain, finite bandwidth have a big impact on the accuracy of the track-and-hold circuit. Basic correlated double sampling...
Full integration of CMOS low noise amplifiers (LNA) presents a challenge for low
cost CMOS receiver systems. A critical problem faced in the design of an RF CMOS LNA
is the inaccurate high-frequency noise model of the MOSFET implemented in circuit
simulators such as SPICE. Silicon-based monolithic inductors are another...
The major limiting factor of DRAM access time is the low transconductance of the
MOSFET's which have only limited current drive capability. The bipolar junction
transistor(BJT) has a collector current amplification factor, β, times base current and is
limited mostly by the willingness to supply this base current. This collector...
The dependence of the substrate resistance, R[subscript sub], for MOS transistor RF modeling on transistor biasing and layout is studied from device simulations and measurements. Though R[subscript sub] is found to be bias dependent, the error incurred by assuming a constant value equal to the DC resistance is not significant....