The major goal of this research work was to develop better
electrical measurements for the evaluation of silicon material
quality.
The first approach investigated was the Zerbst generation
lifetime measurement technique. It was demonstrated that the
error in the estimation of the generation lifetime obtained with
this technique could be...
Imperfections in semiconductor materials constitute a rich area for research. The importance of the characterization of these imperfections cannot be understated. Junction spectroscopic techniques provide a unique tool for the study of these imperfections. The test specimens could consist of Schottky barrier, p-n junctions, or MOS structures. Using Schottky barrier...
The refresh times of all dynamic charge storage devices, best
characterized by the generation lifetime at roan temperature and the
recombination lifetime at higher device operating temperatures
(T>70°C), strongly influence the efficient and successful operation
of dynamic charge storage devices such as DRAM's and CCD's. Both
recombination and generation lifetime...
A complete Gallium Arsenide Metal Semiconconductor
Field Effect Transistor (GaAs MESFET) model including deep-level
trap effects has been developed, which is far more
accurate than previous equivalent circuit models, for high-speed
applications in linear integrated circuit design.
A new self-backgating GaAs MESFET model, which can
simulate low frequency anomalies, is...
The purpose of this work is to develop a new model for LDD
n-MOSFET degradation in drain current under long-term AC use
conditions for lifetime projection which includes a self-limiting
effect in the hot-electron induced device degradation.
Experimental results on LDD n-channel MOSFETs shows that the
maximum drain current degradation...
Reliability of sub-micron analog circuits is directly related to impact ionization and
the subsequent changes in threshold voltage and drain current of n-MOSFET devices.
This thesis presents theory of the hot-electron effects on the device characteristics and
circuit performance, explores several approaches to improve performance at both the
device and...
Previous work at Stanford University has demonstrated that inductance in the
substrate connection is the principal problem underlying the coupling of digital
switching noise into analog circuits. The low impedance substrate can be treated
as a single node over a local area. Switching in the digital circuits produces
current transients...
A negatively biased substrate has several advantages over a grounded substrate in CMOS
technology. The on-chip generation of this negative substrate bias has made chips easier
to use when only a single supply is preferred. This project demonstrates two types of
charge pump circuits used to generate negative voltages not...
Substrate switching noise is becoming a concern as integrated circuits get larger and speeds get faster. Mixed-mode integrated circuits are especially affected as the substrate noise interferes with sensitive analog circuits resulting in limited signal to noise ratios. This thesis serves to study the cause of the noise at the...
The major limiting factor of DRAM access time is the low transconductance of the
MOSFET's which have only limited current drive capability. The bipolar junction
transistor(BJT) has a collector current amplification factor, β, times base current and is
limited mostly by the willingness to supply this base current. This collector...
Previous studies on low frequency flicker noise in bipolar junction transistors (BJT) are reviewed. The original BJT flicker noise sources are mainly attributed to the fluctuation in base surface recombination and the fluctuation in the mobility or diffusivity of free charge carriers. Our experiments were done to verify a newly...
This thesis deals with 1/f noise in p-MOS, bipolar, and lateral bipolar transistors. Experimental measurements determine the appropriate 1/f noise for MOSFET's, bipolar transistors and lateral bipolar transistors. The literature on 1/f noise in p-MOSFETs, bipolar transistors and lateral bipolar transistors is reviewed. The two main sources of low frequency...
The future of mixed-signal, memory, and microprocessor technologies are dependent on ever increasing analog and digital integration, higher cell densities, and demand for more processing power. As a result MOSFET device dimensions continue to shrink to meet these demands. A side effect of device scaling is increased variability at each...
Solar photovoltaic is considered one among many new alternatives to satisfy
our demand for energy. Solar Cells have undergone changes in the last 50 years or so
since its invention in 1954. Solar power is beginning to challenge conventional
energy sources in terms of mainstream acceptance. Solar power along with...
In Radio Frequency Integrated Circuits (RFIC) or high frequency digital
ICs, there is a demand to probe the internal nodes for testing. The ultra low
capacitance RFIC probe presented in his work is a flexible tool for these
applications. The probe utilizes the coupling between a tungsten needle and the...
A comparison and analysis of jitter for five different architectures of ring oscillators using a novel simulation technique developed by Professor Forbes' group is presented. Ring oscillators have become an essential building block in many digital and synchronous communications system due to their integrated nature and are widely used in...
In the first part of this dissertation, low frequency l/f or flicker noise in the frequency range of Hz to kHz has been identified and demonstrated to be described by temperature fluctuations in heat conduction in bipolar transistors operated at higher power densities. This noise phenomenon is not described by...
This research work focuses on the mechanism of 1/f noise in GaAs
resistors on semi-insulating substrates and 1/f noise due to temperature
fluctuations in heat conduction in resistors, diodes, and bipolar transistors. The
goal of this research is to generate accurate models to explain physical origin of 1/f
noise in...