This paper describes a new analog-to-digital converter based on the traditional dual-slope ADC operation. With a small modification to the discharging phase of the dual-slope ADC, first-order quantization noise shaping is achieved. This quantizer is used in a second-order loop filter and results in an overall third-order quantization noise shaping....
A noise-shaped pipelined ADC is presented in this paper. A minimal complexity ΔΣ modulator in
the first two sub-ADCs and residue feedback in the latter stages lead to high-order noise shaping. This
also leads to reduced sensitivity to analog imperfections in the front-end stage. Implemented in 0.18μ m
CMOS, the...
It is demonstrated in this paper that it is possible
to synthesize a stochastic flash ADC entirely from Verilog code
and a standard digital library. An analog comparator is introduced
that is constructed from two cross-coupled 3-input digital
NAND gates, and can be described in Verilog. The synthesized
comparators have...
An analysis of the statistics of multi-stage (pipeline, SAR and algorithmic) ADCs with redundancy is performed and the ability to achieve an extra 6dB of resolution in ADCs with half-bit redundancy is shown due to probability density function (PDF) residue shaping. This paper classifies redundancy techniques to show that only...
The demand for portable electronic systems and the continued
down-scaling of device dimensions resulted in rapid improvement in
the performance of integrated systems. Several low-voltage design
techniques have been proposed to operate analog circuits with sub-1V
supply. However, these techniques require higher power consumption
to achieve large dynamic range while...
New amplifier architectures are presented using non-traditional methods of biasing. Time-based dynamic biasing and signal-based dynamic biasing are discussed in the context of new architectures. This includes a new form of ring amplification with a dynamic deadzone, allowing for a structure whose coarse path does not consume static power.
Ring amplification has emerged as an efficient technique to drive large capacitive loads in switched capacitor circuits. We propose circuit techniques to demonstrate the first application of a ring amplifier in a non-capacitive feedback system of a LDO. These techniques enable a simple cap-less LDO structure in 180nm CMOS that...
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Un-KuMoon
Ring amplification has emerged as an efficient technique to drive large
The internet-of-things is a growing market segment which is based on an arrayof portable communication devices with high power efficiency. Advanced semiconductortechnology can easily improve their digital performance, but the samecannot be said for the analog blocks which are vital to their operation. Highperformance analog circuits continue to use conventional...
Recent publications show that successive approximation register (SAR) analog to digital converters (ADC) are capable of achieving high efficiency over other ADC topologies. Furthermore, techniques have been adopted to process signals with low activity periods, such as biomedical and industrial sensors. Prior work used least- significant bit first quantization (LSBFQ)...
A radix-based calibration technique was previously proposed with a two-stage algorithmic analog-to-digital converter (ADC). The objective of this work is to verify the capability of radix-based calibration for a true multi-stage ADC. In order to prove the idea, a single bit-per-stage, 20-stage pipelined ADC is designed in a 0.35-μm CMOS...