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Filtering by: Advisor Temes, G. C. Remove constraint Advisor: Temes, G. C. Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science

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  • 5th-Order Elliptic LPF Using Passive Charge Compensation Technique (PCC) Design

    Creator:
    Tsai, Cheng H.
    Abstract:
    The passive charge compensation (PCC) technique was introduced for switched capacitor (SC) circuit to increase the slew rate and enhance the linearity performance, as PCC techniques are used on the Delta-Sigma modulator (DSM) in ADC circuitry. The PCC technique of the project was applied to the design of a SC...
    Resource Type:
    Masters Thesis
    Full Text:
    : ______________________________________________________ Gabor C. Temes The passive charge compensation (PCC) technique was introduced for

  • Low-Power 12-bit Quasi-Passive Segmented DAC Implemented in 130nm CMOS Technology

    Creator:
    Pierce, Alexander G.
    Abstract:
    This thesis work proposes a low-power 12-bit digital-to-analog converter (DAC) designed in a 130nm process. The DAC to be presented is of a segmented design where the architecture is split into pipelined and thermometer coded segments. This allows for high linearity and low distortion while maintaining high speed and low...
    Resource Type:
    Masters Thesis
    Full Text:
    Gabor C. Temes This thesis work proposes a low-power 12-bit digital-to-analog converter (DAC

  • Switched Capacitor Circuit Techniques for High Performance CMOS Analog Circuits

    Creator:
    Kareppagoudr, Manjunath
    Abstract:
    Switched capacitor (SC) circuits are the main building blocks in many structures such as filters, data converters, sampling circuits and sampled-data amplifiers. The key challenge is to design such circuits which are the prime components of any IoT system with low power consumption without compromising on the performance. In this...
    Resource Type:
    Dissertation
    Full Text:
    Abstract approved: ______________________________________________________ Gabor C Temes Switched

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
    Resource Type:
    Dissertation
    Full Text:
    Analog-to-Digital Converters Abstract approved: Gabor C. Temes Filters and data converters are key

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    published in: M. Sadollahi, K. Hamashita, K. Sobue and G. C. Temes, "An 11-Bit 250-nW 10- kS/s SAR ADC

  • Dynamic Error Calibration for Continuous-Time Delta-Sigma Modulator with Multi-GHz Sampling Rate

    Creator:
    He, Tao
    Abstract:
    Continuous-time ΔΣ modulators are widely used in cellular handsets due to their power efficiency and inherent anti-aliasing characteristics. To achieve demanding cellular bandwidth requirements while maintaining good power efficiency, multi-bit feedback is typically used. This approach provides benefits such as lower OSR, relaxed loop filter requirements, and reduced jitter sensitivity....
    Resource Type:
    Dissertation
    Full Text:
    Rate Abstract approved: ______________________________________________________ Gabor C

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
    Full Text:
    , R. Schreier and G. C. Temes, Delta-Sigma Data Converters: Theory, Design and simulation. New York

  • Linearity enhancement techniques for data converters

    Creator:
    Cao, Jinzhou
    Abstract:
    Data converters are essential interface circuits between the analog world that people live in and the digital processors that people live with. Linearity, which often is a tradeoff against other performance criteria, is one of the major performance demands from applications for both analog-to-digital converts (ADC) and digital-to-analog converters (DAC)....
    Resource Type:
    Dissertation
    Full Text:
    : ______________________________________________________ Gabor C. Temes Data converters are essential interface circuits between the analog

  • Low-power successive approximation analog to digital converter with digital calibration

    Creator:
    Li, Wei
    Abstract:
    IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
    Resource Type:
    Dissertation
    Full Text:
    ," ISSCC 2011, pp. 190-192, Feb. 2011. [1-11] K. Doris, E. Janssen, C. Nani, A. Zanikopoulos, and G. van

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    : ______________________________________________________ Gabor C. Temes This dissertation presents two high-speed pipeline successive